Description
6
SNOU168 – June 2019
Copyright © 2019, Texas Instruments Incorporated
LMG3410R150-031 EVM User Guide
WARNING
To minimize the risk of electrical shock hazard caused by high-
voltage levels on the evaluation module whenever it is energized,
proper precautions must be taken when working with the EVM.
Refer
for high voltage evaluation user safety guidelines.
2.1.1
FAULT
The FA_1 and FA_2 are the fault signal for top and bottom LMG3410EVM-031 respectively. They are
active low when an under voltage lockout on an auxiliary voltage rail, over temperature or overcurrent
even occurs on the LMG3410R150. The fault signal FA_1 for the top LMG3410R150 device is level
shifted to AGND and the fault signal FA_2 for the bottom LMG3410R150 device is referenced to AGND.
CAUTION
Please do NOT ignore fault signal when using LMG3410EVM-031. Turn off
both top and bottom devices, if any device is generating fault signal. The device
under fault condition may operate in undesired 3rd-quadrant mode and may be
over heated and damaged due to the high source-drain voltage drop if the other
device is still switching.
2.1.2
Power Pins
While there are some power stage bypass capacitors on the LMG3410EVM-031 from VDC to PGND to
minimize voltage overshoot during switching, more bulk capacitance is required to hold up the DC voltage
during operation. It is highly recommended to minimize, and ideally prevent, any overlap and parasitic
capacitance from VSW to VDC, PGND and any logic pins. The two grounds PGND and AGND are
connected to each other on the LMG3410EVM-031.
2.1.3
Bootstrap Mode
The LMG3410EVM-031 operates in bootstrap mode, where the 12V bias voltage is used to power both
LMG3410R150 devices. The isolated power supply board can be separated from the main board along
the score line to save the space. The isolated power supply board must not be connected to the main
board under the bootstrap mode.
2.1.4
Isolated Power Supply Mode
The LMG3410EVM-031 card can be modified to enable the top LMG3410R150 Q1 to operate in the
isolated power supply mode. This can be achieved by populating a 0
Ω
resistor on R1 and two 2-position
sockets with 1.27 mm pitch mating such as M50-3140245 on J4 and J5. The isolated power supply board
needs to be separated from the main board along the score line and placed on the main board though J4
and J5, shown in
and
. Make sure the direction of the isolated power supply following the
illustration in
. To disconnect from the boostrap mode, D1 and R2 needs to be removed. Do NOT
power up the LMG3410EVM-031 when R1, R2 and D1 are all populated with the isolated power supply
board connected.
2.1.5
Heatsink
The heatsink is installed to help with heat dissipation of the LMG3410R150. Exposed copper pads that are
attached to the die attach pad (DAP) of both the high and low side devices are provided for a low thermal
impedance point to a heatsink. The two copper pads have high voltage potential difference between them
so an electrically isolative thermal interface material (TIM) is required. Please refer to
for the
recommended TIM and mechanical fixture.
