Description
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SNOU140A – April 2016 – Revised May 2017
Copyright © 2016–2017, Texas Instruments Incorporated
Using the LMG3410-HB-EVM Half-Bridge and LMG34XX-BB-EVM Breakout
Board EVM
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LMG3410-HB-EVM List of Materials
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LMG34XX-BB-EVM List of Materials
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Trademarks
All trademarks are the property of their respective owners.
1
Description
The LMG3410-HB-EVM operates as a daughter card as part of a larger custom designed system or with
the LMG34XX-BB-EVM breakout motherboard.
1.1
LMG3410-HB-EVM
The LMG3410-HB-EVM configures two LMG3410 GaN FETs in a half bridge. All the bias and level shifting
components are included, allowing low side referenced signals to control both FETs. High frequency
bypass capacitors are included on the power stage in an optimized layout to minimize parasitic inductance
and reduce voltage overshoot.
There are 6 logic pins on the FET card
Table 1. Logic Pin Function Description
Pin
Description
AGND
Logic and bias power ground return pin. Functionally isolated from PGND.
12V
Auxiliary power input for when the LMG3410-HB-EVM is configured in bootstrap mode. Pin is not used
when configured in isolated power mode.
5V
Auxiliary power input for the LMG3410-HB-EVM. Used to power logic isolators. Used as input bias power
of LMG3410 devices when configured in isolated power mode.
FAULT
Logic AND output from FAULT signal from LMG3410. Pin is either pulled to AGND or 5V.
Q2 Gate
AGND referenced logic gate signal input for bottom LMG3410. Compatible with both 3.3V and 5V logic.
Q1 Gate
AGND referenced logic gate signal input for top LMG3410. Compatible with both 3.3V and 5V logic.
There are 3 power pins on the FET card.
Table 2. Power Pin Function Description
Pin
Description
VSW
Switch node of the half bridge
VDC
Input DC voltage of the half bridge
PGND
Power ground of the half bridge. Functionally isolated from
AGND.