of minimum duty cycle limit is governed by the following equa-
tion:
(22)
PWM Dimming
PWM dimming control can be realized by applying PWM dim-
ming signal to the DIM terminal of the board directly. When
the DIM pin is pulled to logic high, all output channles are
enabled. When the DIM pin is pulled to logic low (GND), all
output channels are turned OFF. In cascade operation, the
DIM signal should only be applied to the MASTER unit. The
LM3464A on the MASTER unit propagates the PWM dimming
signal on its DIM pin to the slave units one by one through the
SYNC pin. PWM dimming control is allowed when thermal
foldback control is activated. When PWM dimming and ther-
mal foldback controls are required simultaneously, the PWM
dimming frequency should be set at least ten times below the
thermal foldback dimming frequency. The thermal foldback
dimming signal reduces the LED currents according to the
voltage at the Thermal pin when the signal at the DIM pin is
being pulled ‘high’ as shown in figure 7.
30127115
FIGURE 7. Thermal Fo PWM Dimming Control
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