Board Layout and Probing
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The on-time of this evaluation board ranges from
≊
2300 ns at V
IN
= 12 V, to
≊
900 ns at V
IN
= 30 V. The
on-time varies inversely with V
IN
to maintain a nearly constant switching frequency. At the end of each on-
time the Minimum Off-Timer ensures the buck switch is off for at least 250 ns. In normal operation, the off-
time is much longer. During the off-time, the output capacitor (C7) is discharged by the load current. When
the output voltage falls sufficiently that the voltage at FB is below 2.5 V, the regulation comparator initiates
a new on-time period. For stable, fixed frequency operation,
≊
25 mV of ripple is required at FB to switch
the regulation comparator. For a more detailed block diagram and a complete description of the various
functional blocks, see the LM2695 High Voltage (30V, 1.25A) Step Down Switching Regulator Data Sheet
(
SNVS413
).
3
Board Layout and Probing
The pictorial in
Figure 1
shows the placement of the circuit components. The following should be kept in
mind when the board is powered:
•
When operating at high input voltage and high load current, forced air flow is recommended.
•
The LM2695, and diode D1 may be hot to the touch when operating at high input voltage and high load
current.
•
Use CAUTION when probing the circuit at high input voltages to prevent injury, as well as possible
damage to the circuit.
•
At maximum load current (1A), the wire size and length used to connect the load becomes important.
Ensure there is not a significant drop in the wires between this evaluation board and the load.
4
Board Connection/Start-up
The input connections are made to the J1 connector. The load is normally connected to the OUT1 and
GND terminals of the J3 connector. Ensure the wires are adequately sized for the intended load current.
Before start-up a voltmeter should be connected to the input terminals, and to the output terminals. The
load current should be monitored with an ammeter or a current probe. It is recommended that the input
voltage be increased gradually to 12 V, at which time the output voltage should be 10 V. If the output
voltage is correct with 12 V at V
IN
, then increase the input voltage as desired and proceed with evaluating
the circuit.
5
Output Ripple Control
The LM2695 requires a minimum of 25 mVp-p ripple at the FB pin, in phase with the swtiching waveform
at the SW pin, for proper operation. In the simplest configuration that ripple is derived from the ripple at
V
OUT1
, generated by the inductor’s ripple current flowing through R4. That ripple voltage is attenuated by
the feedback resistors, requiring that the ripple amplitude at V
OUT1
be higher than the minimum of 25 mVp-
p by the gain factor. Options for reducing the output ripple are discussed below, and the results are shown
in the graph of
Figure 9
.
5.1
Minimum Output Ripple
This evaluation board is configured for minimum ripple at V
OUT1
by setting R4 to 0
Ω
, and including
components R6, C9 and C10. The output ripple that ranges from 3mVp-p at V
IN
= 12 V to 8 mVp-p at V
IN
=
30 V is determined primarily by the ESR of output capacitor (C7), and the inductor’s ripple current that
ranges from 50 mAp-p to 195 mAp-p over the input voltage range. The ripple voltage required by the FB
pin is generated by R6, C9 and C10 since the SW pin switches from -1 V to V
IN
, and the right end of C9 is
a virtual ground. The values for R6 and C9 are chosen to generate a 30-40 mVp-p triangle waveform at
their junction. That triangle wave is then coupled to the FB pin through C10. The following procedure is
used to calculate values for R6, C9 and C10:
•
Calculate the voltage V
A
as shown in
Equation 2
:
V
A
= V
OUT
- (V
SW
x (1 - (V
OUT
/V
IN
)))
(2)
where, V
SW
is the absolute value of the voltage at the SW pin during the off-time (typically 1 V) and V
IN
is the minimum input voltage. For this circuit, V
A
calculates to 9.83 V. This is the DC voltage at the
R6/C9 junction, and is used in
Equation 3
.
2
AN-1444 LM2695 Evaluation Board
SNVA147A – February 2006 – Revised April 2013
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