V
IN
= 5.5 V...36 V
SS2
RES
DEMB
AGND
SS1
COMP2
PGND2
VOUT2
CS2
LO2
SW2
HO2
HB2
VIN
COMP1
PGND1
VOUT1
CS1
LO1
SW1
HO1
HB1
VCC
PG1
HOL1
LOL1
HOL2
LOL2
EN1
EN2
VCCX
RT
VDDA
PG2
FB1
SYNCOUT
VIN
VIN
FB2 MODE
V
OUT
= 5 V
I
OUT
= 15 A
LM5143-Q1
* V
OUT
tracks V
IN
if V
IN
< 5.4 V
L
O1
C
OUT2
C
IN
C
SS
C
RES
C
VDD
C
C2
R
C1
C
C1
L
O2
C
OUT1
R
S2
R
S1
Q
L1
Q
H1
Q
L2
Q
H2
R
HO2
R
HO1
C
DITH
DITH
R
RT
Copyright © 2018, Texas Instruments Incorporated
VDDA
V
OUT2
= 5 V
I
OUT2
= 7 A
V
IN
= 5.5 V...36 V
SS2 RES
DEMB
AGND SS1
COMP2
PGND2
VOUT2
CS2
LO2
SW2
HO2
HB2
VIN
COMP1
PGND1
VOUT1
CS1
LO1
SW1
HO1
HB1
VCC
PG1
HOL1
LOL1
HOL2
LOL2
EN1
EN2
VCCX
RT
VDDA
PG2
FB1
SYNCOUT
VIN
VIN
FB2 MODE
V
OUT1
= 3.3 V
I
OUT1
= 7 A
LM5143-Q1
* V
OUT1
tracks V
IN
if V
IN
< 5.4 V
V
OUT2
tracks V
IN
if V
IN
< 3.7 V
C
C4
R
C2
L
O1
C
OUT2
C
IN
C
SS1
C
C3
C
SS2
C
RES
C
VDD
C
C2
R
C1
C
C1
L
O2
C
OUT1
R
S2
R
S1
Q
L1
Q
H1
Q
L2
Q
H2
R
HO2
R
HO1
C
DITH
DITH
R
RT
VDDA
Copyright © 2018, Texas Instruments Incorporated
Application Circuit Diagram
6
SNVU623B – October 2018 – Revised April 2020
Copyright © 2018–2020, Texas Instruments Incorporated
LM5143-Q1 EVM User's Guide
3
Application Circuit Diagram
shows the schematic of an LM5143-Q1-based synchronous buck regulator (EMI filter stage not
shown). Soft start (SS), restart (RES), and dither (DITH) components are shown that are configurable as
required by the specific application.
As shown in
, a two-phase, single-output regulator is implemented by typing the outputs together,
connecting COMP1 to COMP2, SS1 to SS2, MODE to VDDA, and FB2 to AGND.
Figure 1. LM5143-Q1 Dual Synchronous Buck Regulator Simplified Schematic
Figure 2. LM5143-Q1 Single-Output, Two-Phase Synchronous Buck Regulator Simplified Schematic