1
1
2
2
3
3
4
4
5
5
6
6
D
D
C
C
B
B
A
A
7
10
11/9/2014
SV600978A_CONNECTORS.SchDoc
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File:
Sheet:
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DS90UB949-Q1EVM
Project Title:
Designed for:
Public Release
Assembly Variant:
004
© Texas Instruments
2014
Drawn By:
Engineer:
Tran Dam
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
Not in version control
SVN Rev:
SV600978
Number:
Rev:
A
1
2
3
4
5
J11
142-0701-851
1
2
3
4
5
J12
142-0701-851
1
2
3
4
5
J13
142-0701-851
GND
GND
GND
GND
DOUT0_P
DOUT0_N
DOUT1_P
DOUT1_N
49.9
R118
DNP
49.9
R114
DNP
49.9
R112
DNP
49.9
R109
DNP
GND
GND
IN_CLK_P
IN_D0_N
IN_D0_P
IN_D1_N
IN_D1_P
IN_D2_N
IN_D2_P
IN_CLK_N
CEC
DDC_SCL
DDC_SDA
RX_5V
HPD
GND
GND
VDD_DDC
0.1µF
C85
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
J23
TSW-108-07-G-D
0
R132
0
R135
0
R137
0
R138
0
R139
0
R141
0
R143
DNP
0
R144
DNP
PDB
D_GPIO0/MOSI
D_GPIO1/MISO
D_GPIO2/SPLK
D_GPIO3/SS
INTB
SDA
SCL
GPIO1/I2C(SCL)
GPIO0/I2C(SDA)
GPIO2/SPI(SCLK)
GPIO6/PWM1/SPI(CS)
GPIO4/SPI(SIMO)/UART(TXD)
GPIO5/SPI(SOMI)/UART(RXD)
PDB_CTRL
INTB_CTRL
0
R113
0
R115
0
R117
0
R119
0
R120
0
R121
0
R125
0
R128
4
1
2
3
J20
0022112042
4
1
2
3
J24
0022112042
1
2
J26
5-146261-1
GND
GND
GND
4.7pF
C88
4.7pF
C87
4.7pF
C90
4.7pF
C91
4.7pF
C92
0
R142
0
R134
0
R136
0
R126
0
R127
CEC
DDC_SCL
DDC_SDA
SDA
SCL
1
2
J17
5-146261-1
1
2
J22
5-146261-1
VDD_I2C
VDD_DDC
0.1µF
C86
DNP
0.1µF
C89
GND
GND
RES0_0
RES0_1
GND
GND
GND
I2S_CLK/GPIO8_REG
I2S_WC/GPIO7_REG
I2S_DA/GPIO6_REG
I2S_DB/GPIO5_REG
I2S_DC/GPIO2
I2S_DD/GPIO3
VDDIO
SDIN/GPIO0
SWC/GPIO1
SCLK
MCLK
0
R133
D_GPIO0/MOSI
D_GPIO1/MISO
D_GPIO2/SPLK
D_GPIO3/SS
1
2
J15
5-146261-1
INTB
GND
0
R129
0
R108
0
R110
TP3
1
2
J19
5-146261-1
RX_5V
GND
1
2
J16
5-146261-1
HPD
GND
4
1
2
3
J25
TSW-104-07-G-S
DAOUT
BCK
LRCK
SCKIN
4.7k
R124
4.7k
R123
47k
R130
47k
R131
27k
R140
VDD33
10.0k
R116
10.0k
R122
1
2
3
J14
TSW-103-07-G-S
1
2
3
J18
TSW-103-07-G-S
VDDIO
VDDIO
1.0k
R111
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
17
19
21
23
25
27
29
31
16
18
20
22
24
26
28
30
32
J21
TSW-116-07-G-D
IN_CLK_N
IN_CLK_P
IN_D0_N
IN_D0_P
IN_D1_N
IN_D1_P
IN_D2_N
IN_D2_P
DOUT1_N
DOUT1_P
DOUT0_N
DOUT0_P
J10_12_N
J10_12_P
J10_9_N
J10_9_P
J10_6_N
J10_6_P
J10_3_N
J10_3_P
1
2
3
4
L10
DLW21SN261XQ2L
1
2
3
4
L11
DLW21SN261XQ2L
1
2
2
3
2
1
2
0
2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
J10
1747981-1
1
2
3
4
5
J9
142-0701-851
GND
SMAD0_N
SMAD0_P
SMAD1_N
SMAD1_P
SMAD0_N
SMAD0_P
SMAD1_N
SMAD1_P
0
R209
DNP
0
R210
DNP
0
R211
DNP
0
R212
DNP
SH-J14
SH-J17
SH-J18
SH-J22
2
1
4
3
PAIR A1
PAIR A2
EMITTER
P1
D4S20G-400A5-Z
1
2
3
4
5
6
7
8
U3
Assembly Note
ZZ5
Jumper SH-J14 connects Pin 2 and 3 for Header J14
Assembly Note
ZZ6
Jumper SH-J17 connects Pin 1 and 2 for Header J17
Assembly Note
ZZ7
Jumper SH-J18 connects Pin 2 and 3 for Header J18
Assembly Note
ZZ8
Jumper SH-J22 connects Pin 1 and 2 for Header J22
Appendix A
39
SNLU172 – January 2015
EVM PCB Schematics
Copyright © 2015, Texas Instruments Incorporated