Texas Instruments DS125BR820EVM, User Manual, Page: 6 / 21

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VODA0 VODA1
Chapter 2
SNLU166 – August 2014
4-Level IO Control
The channel settings and controls are configurable in pin mode for the DS125BR820 via four logic levels
(0, R, F, 1). The four logic levels correspond to the following voltages in
Table 2-1 .
Table 2-1. Description of 4-Level Voltage Inputs
Internal Pin Voltage (3.3 V Internal Pin Voltage (2.5 V
Level Setting
Mode) Mode)
0 Tie 1k Ω to GND 0.10 V 0.08 V
R Tie 20k Ω to GND 1/3 x VIN 1/3 x VDD
F Float (leave pin open) 2/3 x VIN 2/3 x VDD
1 Tie 1k Ω to VIN or VDD VIN – 0.05 V VDD – 0.04 V
Typical 4-level input thresholds:
• Internal threshold between 0 and R = 0.2 * V
IN
or V
DD
• Internal threshold between R and F = 0.5 * V
IN
or V
DD
• Internal threshold between F and 1 = 0.8 * V
IN
or V
DD
To set these 4-level voltage inputs, each input is controlled by a group of three switches in accordance
with
Figure 2-1 . These switches are located on the back of the EVM. For switch modules that come in a
set of six (such as SW3), switches 6-5-4 control one setting, and switches 3-2-1 control another.
Figure 2-1. Switch Orientation for User Configuration
NOTE: The switches on the back of the EVM physically display the switch numbers in ascending
order, as shown from the example in Figure 2-1 . However, conventional notation of switch
settings are typically given in descending order. Therefore, switch configurations for the
EVM will appear in descending order for the rest of this User's Guide as a result of this
notation convention.
The following switches are used to set the input condition for 4-level inputs: SW1, SW2, SW3, SW5, SW6,
SW8, and SW9 .
The switch configurations for each of the 4-level inputs are shown in Table 2-2 . Note the notation in
descending order.
6 4-Level IO Control SNLU166 – August 2014
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