Texas Instruments DRV8317HEVM, User Manual

Page: 12 / 29

Table 4-5. Connections for Header J3 on DRV8317HEVM (DNP in bold) (continued)
J3 Pin Number DRV8317HEVM Function LAUNCHXL-F280049C Function Description
5 Not used GPIO13/SCIBRX Not used
6 VSENA ADCINA5 Phase A Voltage Sense
7 HALLC GPIO40/SCIBTX Hall sensor C from motor
8 VSENB ADCINB0 Phase B Voltage Sense
9 nSLEEP (DNP) NC For internal use only
10 VSENC ADCINC2 Phase C Voltage Sense
11 Not used ADCINB3/VDAC Not used
12 VSENVM ADCINB1 VM Bus Voltage Sense
13 SCLK SPIACLK SPI Clock (DRV8317S only)
14 ISENA ADCINB2 Phase A low side Current Sense
15 nFAULT (DNP) ADCINC4 For internal use only
16 ISENB ADCINC0 Phase B low side Current Sense
17 nSLEEP GPIO37 Active-low input to sleep pin
18 ISENC ADCINA9 Phase C low side Current Sense
19 nFAULT GPIO35 Active-low output from fault pin
20 C_TAP ADCINA1 ADC for Center Tap sensing
Table 4-6. Connections for Header J4 on DRV8317HEVM
J4 Pin Number DRV8317HEVM Function LAUNCHXL-F280049C Function Description
1 INHA GPIO10/PWM6A PWM used to switch High-side
FET of Phase A
2 AGND GND GND connection
3 INLA GPIO11/PWM6B PWM used to switch Low-side
FET of Phase A
4 nSCS SPIASTE SPI active-low chip select
(DRV8317S only)
5 INHB GPIO8/PWM5A PWM used to switch High-side
FET of Phase B
6 Not used NC Not used
7 INLB GPIO9/PWM5B PWM used to switch Low-side
FET of Phase B
8 Not used NC Not used
9 INHC GPIO4/PWM3A PWM used to switch High-side
FET of Phase
10 Not used XRSn Not used
11 INLC GPIO5/PWM3B PWM used to switch Low-side
FET of Phase C
12 SDI SPIASIMO SPI data input
13 HALLA GPIO58 HALL sensor A from motor
14 SDO SPIASOMI SPI data output (DRV8317S only)
15 HALLB GPIO30 HALL sensor B from motor
16 Not used GPIO39 Not used
Hardware and Software Overview www.ti.com
12 DRV8317HEVM User's Guide SLVUCL3 – DECEMBER 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated