Texas Instruments DM38x DaVinci, User Manual

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Registers
889 SPRUHI7A – December 2012 – Revised June 2016
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High-Definition Video Processing Subsystem (HDVPSS)
1.3.14.1 VIP_PARSER_main Register (offset = 0h) [reset = 0h]
VIP_PARSER_main is shown in Figure 1-563 and described in Table 1-481 .
Main Configuration for VIP Parser
Figure 1-563. VIP_PARSER_main Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
Reserved CLIP_ACTIVE CLIP_BLNK Reserved DATA_INTERFACE_MODE
R-0h R/W-0h R/W-0h R-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 1-481. VIP_PARSER_main Register Field Descriptions
Bit Field Type Reset Description
31-6 Reserved R 0h
5 CLIP_ACTIVE R/W 0h
Discrete Sync Only '0' = Do not clip active pixels '1' = Clip Active
Pixels as follows: 0xFF -andgt; 0xFE.. 0x00 -andgt; 0x01
4 CLIP_BLNK R/W 0h
Discrete Sync Only '0' = Do not clip Blanking Data '1' = Clip Blanking
Data as follows: 0xFF -andgt; 0xFE.. 0x00 -andgt; 0x01
3-2 Reserved R 0h
1-0 DATA_INTERFACE_MOD
E R/W 0h
00 = 24b data interface. Uses Port A settings 01 = 16b data
interface. Uses Port A settings. 10 = Dual independent 8b data
interfaces. Uses independent Port A and Port B settings. 11 =
Undefined
NOTE: Embedded sync input source is already clipped because the two 0x00 and 0xFF codes are
illegal values in the active video data and they are reserved only for start codes.
If there is any need to down the line to pack this stream into an embedded sync format (input
source contains the 0x00 and 0xFF codes), then the VIP Parser can be configured to clip the
data on the way to being stored in memory. This prevents MPU or DSP to go through every
byte to check if the data has to be clipped.