Texas Instruments DM38x DaVinci, User Manual

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Registers
861 SPRUHI7A – December 2012 – Revised June 2016
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High-Definition Video Processing Subsystem (HDVPSS)
1.3.12.43 SD_VENC_upf1 Register (offset = 120h) [reset = 004EEC06h]
SD_VENC_upf1 is shown in Figure 1-538 and described in Table 1-454 .
2x Upsampling Coefficient 1
Figure 1-538. SD_VENC_upf1 Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
UPFC6
R/W-4Eh
15 14 13 12 11 10 9 8
UPFC5
R/W-ECh
7 6 5 4 3 2 1 0
UPFC4
R/W-6h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 1-454. SD_VENC_upf1 Register Field Descriptions
Bit Field Type Reset Description
31-24 Reserved R 0h
23-16 UPFC6 R/W 4Eh
2x up-sampling filter coefficient 6. s0.7.
15-8 UPFC5 R/W ECh
2x up-sampling filter coefficient 5. s0.7.
7-0 UPFC4 R/W 6h
2x up-sampling filter coefficient 4. s0.7.