Video-0
Video-1
Grpx-0
Grpx-1
Grpx-2
Video
Alpha
Blender
DOR
Alpha
Blender
To <VENC>
0
1
<VENC>_fb_sel
To <VENC>
Image data
Feedback
R
E
O
R
D
E
R
G2
G1
G0
V
V0
V1
L0
L1
L2
L3
D
(A)
Internal Modules
77
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Where a and b are alpha values of input1 and input2 windows respectively. The layer order (top or
bottom) is decided by priority levels of the two video inputs.
The blending and re-ordering in each blender happens as shown in
Figure 1-34. Blending and Reordering
A
Video-1 is tied to 0 for the SD Blender.
1.2.3.4.1 Video Alpha Blender
Two video inputs, Video-0 and Video-1 (sometimes known as MAIN and PIP windows) are first blended
together to generate a single video output as shown in the figure above. The priority level, which
determines which video to be on top, is decided by COMP
→
<VENC> settings. <VENC>_vid.bld_ord
bitfield.
The alpha values for both the videos are configured in CIG module as described in the sections above.
The alpha value (blended alpha) of the blended video output is calculated as follows.
Blended alpha =alpha_bottom video layer
if alpha_top video layer < 0xFF
=alpha_top video layer
if alpha_top video layer = 0xFF
Blended alpha (calculated above) is used as alpha value for the Video input to the DOR module described
below:
The priority of blended video is configured in COMP
→
<VENC>Settings.vid_order fit field.
1.2.3.4.2 Display Order Re-shuffling (DOR)
The DOR module is a fully programmable crossbar switch to allow flexible display order change for all
input layers. Video layer data is placed in the layer based on its register setting (vid_order bit-field). The
graphic data comes with a four-bit priority level configured in the GRPX module. If the global re-order is
set (g_reorder=1), the graphics layers are reordered (from top to bottom) based on COMP register
settings (g0_order, g1_order, g2_order bit-fields). Otherwise, graphics layers are reordered based on
GRPX register (priority) settings as mentioned in the above sections.
