Registers
601
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.3.8.57 VPDMA_int2_channel2_int_stat Register (offset = F0h) [reset = 0h]
VPDMA_int2_channel2_int_stat is shown in
and described in
Figure 1-357. VPDMA_int2_channel2_int_stat Register
31
30
29
28
27
26
25
24
INT_STAT_VIP1_MU
LT_ANCB_SRC9
INT_STAT_VIP1_MU
LT_ANCB_SRC8
INT_STAT_VIP1_MU
LT_ANCB_SRC7
INT_STAT_VIP1_MU
LT_ANCB_SRC6
INT_STAT_VIP1_MU
LT_ANCB_SRC5
INT_STAT_VIP1_MU
LT_ANCB_SRC4
INT_STAT_VIP1_MU
LT_ANCB_SRC3
INT_STAT_VIP1_MU
LT_ANCB_SRC2
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
23
22
21
20
19
18
17
16
INT_STAT_VIP1_MU
LT_ANCB_SRC1
INT_STAT_VIP1_MU
LT_ANCB_SRC0
INT_STAT_VIP1_MU
LT_ANCA_SRC15
INT_STAT_VIP1_MU
LT_ANCA_SRC14
INT_STAT_VIP1_MU
LT_ANCA_SRC13
INT_STAT_VIP1_MU
LT_ANCA_SRC12
INT_STAT_VIP1_MU
LT_ANCA_SRC11
INT_STAT_VIP1_MU
LT_ANCA_SRC10
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
15
14
13
12
11
10
9
8
INT_STAT_VIP1_MU
LT_ANCA_SRC9
INT_STAT_VIP1_MU
LT_ANCA_SRC8
INT_STAT_VIP1_MU
LT_ANCA_SRC7
INT_STAT_VIP1_MU
LT_ANCA_SRC6
INT_STAT_VIP1_MU
LT_ANCA_SRC5
INT_STAT_VIP1_MU
LT_ANCA_SRC4
INT_STAT_VIP1_MU
LT_ANCA_SRC3
INT_STAT_VIP1_MU
LT_ANCA_SRC2
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
7
6
5
4
3
2
1
0
INT_STAT_VIP1_MU
LT_ANCA_SRC1
INT_STAT_VIP1_MU
LT_ANCA_SRC0
INT_STAT_VIP1_MU
LT_PORTB_SRC15
INT_STAT_VIP1_MU
LT_PORTB_SRC14
INT_STAT_VIP1_MU
LT_PORTB_SRC13
INT_STAT_VIP1_MU
LT_PORTB_SRC12
INT_STAT_VIP1_MU
LT_PORTB_SRC11
INT_STAT_VIP1_MU
LT_PORTB_SRC10
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit;
-n
= value after reset
Table 1-269. VPDMA_int2_channel2_int_stat Register Field Descriptions
Bit
Field
Type
Reset
Description
31
INT_STAT_VIP1_MULT_
ANCB_SRC9
W
0h
The last write DMA transaction has completed for channel
vip1_mult_ancb_src9. All data from the channel has been sent and
received by the external memory. If a new channel has not been
setup for the client vip1_anc_b then the client will be fully empty at
this point. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
30
INT_STAT_VIP1_MULT_
ANCB_SRC8
W
0h
The last write DMA transaction has completed for channel
vip1_mult_ancb_src8. All data from the channel has been sent and
received by the external memory. If a new channel has not been
setup for the client vip1_anc_b then the client will be fully empty at
this point. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
29
INT_STAT_VIP1_MULT_
ANCB_SRC7
W
0h
The last write DMA transaction has completed for channel
vip1_mult_ancb_src7. All data from the channel has been sent and
received by the external memory. If a new channel has not been
setup for the client vip1_anc_b then the client will be fully empty at
this point. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
28
INT_STAT_VIP1_MULT_
ANCB_SRC6
W
0h
The last write DMA transaction has completed for channel
vip1_mult_ancb_src6. All data from the channel has been sent and
received by the external memory. If a new channel has not been
setup for the client vip1_anc_b then the client will be fully empty at
this point. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
27
INT_STAT_VIP1_MULT_
ANCB_SRC5
W
0h
The last write DMA transaction has completed for channel
vip1_mult_ancb_src5. All data from the channel has been sent and
received by the external memory. If a new channel has not been
setup for the client vip1_anc_b then the client will be fully empty at
this point. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
26
INT_STAT_VIP1_MULT_
ANCB_SRC4
W
0h
The last write DMA transaction has completed for channel
vip1_mult_ancb_src4. All data from the channel has been sent and
received by the external memory. If a new channel has not been
setup for the client vip1_anc_b then the client will be fully empty at
this point. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
