Texas Instruments DM38x DaVinci, User Manual

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Registers
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366 SPRUHI7A – December 2012 – Revised June 2016
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High-Definition Video Processing Subsystem (HDVPSS)
1.3.5.15 dei_reg14 Register (offset = 38h) [reset = 0h]
dei_reg14 is shown in Figure 1-256 and described in Table 1-166 .
FMD Status Register 2
Figure 1-256. dei_reg14 Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved FMD_FRAME_DIFF
R-0h R-0h
15 14 13 12 11 10 9 8
FMD_FRAME_DIFF
R-0h
7 6 5 4 3 2 1 0
FMD_FRAME_DIFF
R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 1-166. dei_reg14 Register Field Descriptions
Bit Field Type Reset Description
31-20 Reserved R 0h
Reserved
19-0 FMD_FRAME_DIFF R 0h
Frame difference (difference between two top or two bottom fields)