Texas Instruments DM38x DaVinci, User Manual

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VPDMA
CHR_US
DEI
SC_M
420 Current
UV Y
SC out
422
YUV
MV
N-1
in out
To
VIP0
Subsystem
To
YUV422
Compositor
8 8x4
4 4 16
20
20
[9:
2]
{[
8]
,
2
’d0}
VC1
20
[9:
2]
{[8], 2’d0}
16
10x4
10
8
8 8x4
CHR_US
UV Y
8 8x4
{[
8
],
2
’d
0
}
VC1
[9
:2
]
10x4
10
8
8 8x4
CHR_US
UV Y
8 8x4
{[
8
],
2
’d
0
}
VC1
[9
:2
]
10x4
10
8
8 8x4
420 N-1 420 N-2
Description of the Subsystem
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36 SPRUHI7A – December 2012 – Revised June 2016
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Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Table 1-3. VPDMA Client Number
VPDMA Client Number HDVPSS Port
1 / 2 VIP0 YUV/RGB/Ancillary Data (To VPDMA)
3 Secondary-0 Input Path (From VPDMA)
4 Scaler (SC_1) Output Path (To VPDMA)
5 Scaler (SC_5) Output Path (To VPDMA)
6 DEI Motion Data (To/From VPDMA)
7 Primary Video (Fn) Input Path (From VPDMA)
8 Primary Video (Fn-1) Input Path (From VPDMA)
9 Primary Video (Fn-2) Input Path (From VPDMA)
10 Bypass Path-0 Input (BP0) (From VPDMA)
11 Bypass Path-1 Input (BP1) (From VPDMA)
12 Auxiliary Video Input Path (AUX) (From VPDMA)
13 Scaler (SC_2) Output Path (To VPDMA)
14 GRPX0 RGB/Stencil/CLUT Input Path (From VPDMA)
15 GRPX1 RGB/Stencil/CLUT Input Path (From VPDMA)
16 GRPX2 RGB/Stencil/CLUT Input Path (From VPDMA)
18 Secondary Input Path-1 Input (From VPDMA)
19 SDVENC VBI Data (From VPDMA)
20 / 21 VIP1 YUV/RGB/Ancillary Data (To VPDMA)
22 420 Noise Filter Data (From VPDMA)
23 Noise Filter/Chroma Downsampler Output Data (To VPDMA)
24 422 Noise Filter/Chroma Downsampler Input Data (From VPDMA)
Figure 1-2 provides a more detailed view of the Primary Input Path (PRI), showing the interconnection
between various modules and bit widths.
Figure 1-2. Primary Input Path (PRI) Detailed Block Diagram