Texas Instruments DAC8728EVM User Manual Download Page 11

www.ti.com

Power Supplies

5

Power Supplies

J4 is the power-supply input connector.

Table 9

lists the configuration details for J4. The voltage inputs to

the DAC can be applied directly to the device. The DAC8728 requires multiple power supplies to operate.
AV

DD

, AV

SS

, DV

DD

, and IOV

DD

are required to properly power the DAC. The power should be applied in this

order: IOV

DD

, DV

DD

, then AV

DD

and AV

SS

, followed by the reference voltage.

CAUTION

This sequence must be followed in order to prevent damage to the device.

Table 9. J4 Configuration: Power-Supply Input

Pin No.

Pin Name

Function

Required

J4.1

+VA

+8V to +36V analog supply

Yes

J4.2

-VA

–18V to –4.5V analog supply

Yes

J4.3

+5VA

+5V analog supply

No

J4.4

-5VA

-5V analog supply

No

J4.5

DGND

Digital ground input

Yes

J4.6

AGND

Analog ground input

Yes

J4.7

+1.8VD

1.8V digital supply

Optional

J4.8

+3.3VD

3.3V digital supply

Optional

J4.9

VD1

Not used

No

J4.10

+5VD

+5V digital supply

Optional

NOTE:

To avoid damage to the DAC8728, DV

DD

must stay greater than or equal to IOV

DD

.

The DAC8728EVM board analog section can be powered from either a single-supply or dual supply. In
unipolar mode, AV

SS

is tied to AGND and AV

DD

is powered from +VA, a +8 to +36V analog supply range.

When the DAC8728 is run in bipolar mode, AV

SS

and AV

DD

are required. AV

SS

can range from –4.5V to

–18V, and AV

DD

can range from +4.5V to +18V. The DAC8728 AV

DD

(+VA) supply can be as low as

+4.5V, but in order to properly power the REF02, +VA must be at least +8V. Jumper JP14 allows the user
to select between bipolar and unipolar modes. AV

SS

is either routed to the –VA (pin J4.2) or is connected

to AGND.

DV

DD

powers the digital core of the DAC8728 and can vary from V

REF

to +5.5V. Care must be taken to

ensure that the EVM is not set up in a state where V

REF

is greater than DV

DD

. Jumper JP15 allows the user

to select b3.3V and +5V for DV

DD

.

The IOV

DD

supply sets the voltage of the digital interface and should be configured to match the I/O

voltage of the host processor. Jumpers JP19 and JP20 allow the user to select b1.8V, +3.3V,
and +5V for IOV

DD

. To avoid damaging the DAC8728, DV

DD

must stay greater than or equal to IOV

DD

.

Alternate power sources can be applied via various test points located on the EVM. Refer to the schematic
at the end of this document for details.

NOTE:

While filters are provided for all power-supply inputs, optimal performance of the EVM

requires a clean, well-regulated power source.

11

SBAU161 – February 2010

DAC8728EVM

Submit Documentation Feedback

Copyright © 2010, Texas Instruments Incorporated

Summary of Contents for DAC8728EVM

Page 1: ...e circuit descriptions schematic diagrams and bills of material are included in this document The following related documents are available through the Texas Instruments web site at www ti com Related...

Page 2: ...pply Configuration 15 List of Tables 1 J5 Analog Output Connector Pinout 3 2 J2 Parallel Interface Pins 5 3 External Logic Behavior 6 4 SN74LVC374 Control 7 5 LDAC Control 7 6 A0 and A1 Address Combin...

Page 3: ...ety of processors Consequently access to the parallel interface is achieved through external logic controlled by the host processor parallel interface Throughout this document the acronym EVM and the...

Page 4: ...r line decoder demultiplexer U7 on EVM This device is used to create eight control bits from the processor address that are used around the board to control various signals such as the LATCH input to...

Page 5: ...mpletes DSP Write Strobe Signal is cycled low to J2 3 WE high within the CE strobe when a parallel bus write occurs DSP Read Strobe Signal is cycled low to J2 5 RE high within the CE strobe when a par...

Page 6: ...nections to the SN74LVC139 Figure 1 Parallel Control Header and SN74LVC139 4 1 Required External Logic Most of TI s host processors do not have a hardware chip select that meets the timing requirement...

Page 7: ...374 Control LATCH_CTRL WE LATCH 0 0 0 0 1 1 1 0 1 1 1 1 The final piece of external logic gives the EVM user the ability to control the LDAC signal from both the processor I O pins and the SN74LVC139...

Page 8: ...on the 1Y0 output of the SN74LVC139 U7 The LATCH_CTRL signal is logic ORed with the WE signal to create the LATCH signal that is used to control the CLK input to the SN74LVC374 on the EVM During the...

Page 9: ..._CS0 0 0 1 1 1 0 0 1 1 1 0 1 1 0 1 0 1 1 1 1 0 1 1 1 Table 8 Commonly Used Address Combinations A3 to A0 Hex Open1 LATCH_CTRL 0x0 DC_CS R W 0x5 LDAC LATCH_CTRL 0xC DC_CS Open2 0x7 4 10 BUSY Signal The...

Page 10: ...d TSM 116 01 T DV to provide a convenient 16 pin dual row header socket combination at J6 This header socket combination provides access to the parallel data pins of the DAC8728 and the inputs to the...

Page 11: ...ed from VA a 8 to 36V analog supply range When the DAC8728 is run in bipolar mode AVSS and AVDD are required AVSS can range from 4 5V to 18V and AVDD can range from 4 5V to 18V The DAC8728 AVDD VA sup...

Page 12: ...pers JP1 and JP2 allow the user to route the DAC outputs to the input of a voltage follower amplifier that drives an RC low pass filter The capacitor is not installed and a 0 resistor connects the op...

Page 13: ...ht binary Sets the DAC8728 to unipolar operation by routing JP14 2 3 the AVSS pin to AGND Sets the DVDD input to the DAC8728 to 3 3V from JP15 1 2 pin 10 on the J4 header Routes the OFFSET_B pin direc...

Page 14: ...ET_B pins must be shorted directly to GND for unipolar single supply operation Table 11 Unipolar Single Supply Configuration Jumper Position JP3 JP4 JP5 JP6 JP7 JP9 1 2 JP15 JP17 JP19 JP20 JP14 2 3 JP...

Page 15: ...dual supply operation Table 12 Bipolar Dual Supply Configuration Jumper Position JP3 JP4 JP5 JP6 JP7 JP9 1 2 JP14 JP15 JP17 JP19 JP20 JP1 JP2 JP8 JP13 JP16 JP18 Open JP11 Closed JP10 3 4 Figure 6 Bip...

Page 16: ...r Ceramic 10mF 50V X7S 1210 Taiyo Yuden UMK325C7106MM T C27 11 3 J1 J3 J5 Top 20 pin header Samtec TSM 110 01 T DV 12 3 J1 J3 J5 Bottom 20 pin socket Samtec SSW 110 22 S D VS 13 1 J2 TERMINAL BLOCK 3...

Page 17: ...Op Amp 8 SOP TI OPA227UA 35 1 U4 Dual Precision Op Amp 8 SOP TI OPA2277U 36 2 U5 U6 Little Logic OR Gate SOT23 5 TI SN74LVC1G32DBV 37 1 U7 Dual 2 4 Line Decoder 16 SOP TI SN74LVC139AD 38 2 U8 U12 Litt...

Page 18: ...4 2B3 16 2B4 17 2B5 19 2B6 20 2B7 22 2B8 23 1A1 47 1A2 46 1A3 44 1A4 43 1A5 41 1A6 40 1A7 38 1A8 37 2A1 36 2A2 35 2A3 33 2A4 32 2A5 30 2A6 29 2A7 27 2A8 26 U10 SN74LVC16245A IOVDD R8 15k IOVDD EVM_A0...

Page 19: ...oduct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engine...

Page 20: ...h statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury...

Page 21: ...ltera Analog Devices Intersil Interpoint Microsemi Aeroflex Peregrine Syfer Eurofarad Texas Instrument Miteq Cobham E2V MA COM Hittite Mini Circuits General Dynamics 8 812 309 58 32 8 812 320 02 42 or...

Reviews: