www.ti.com
EVM Operation
6.3
Default Jumper Settings and Switch Positions
Figure 2
shows the jumpers found on the EVM and the respective factory default conditions for each.
Figure 2. DAC7716EVM Default Jumper Locations
Jumper JP1 controls whether the LDAC signal is controlled by J2.15 or J2.17. By default, the LDAC signal
is controlled by J2.17 but can be changed using JP1.
Jumpers JP2, JP3, JP4, and JP5 are used to control the gain of the individual DAC channels. By default,
the jumpers are removed, resulting in each DAC channel having a gain of 4. The gain of the output
channel is 2 when the corresponding jumper is in place.
JP6 and JP7 control the signals applied to REFGND-A and REFGND-B on the DAC7716. By default, a
jumper is placed across JP6.2 and JP6.3 as well as JP7.2 and JP7.3. This jumper connects REFGND-A
and REFGND-B to the ground of the board when an onboard reference is used. When an external
reference source is used, it is recommended that this jumper stay in place and configure the external
reference source to share a common ground with the EVM. See the
Reference Voltage
section for more
information.
Jumper JP8 is used to control the digital voltage for IOVDD. By default, a jumper is in place to short-circuit
pins JP8.1 and JP8.2 to use a 3.3V digital supply. If pins JP8.3 and JP8.4 are connected, a 1.8V digital
supply will be used. If pins JP8.5 and JP8.6 are connected, a 5V digital supply will be used for IOVDD.
Jumper JP9 is not installed. If the user desires to disconnect RFB1 from V
OUT1
, the trace between JP9
must be cut. JP9 can then be installed.
7
SBAU159 – October 2009
DAC7716EVM
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
