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Contents

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FCC Warning

This equipment is intended for use in a laboratory test environment only. It gen-
erates, uses, and can radiate radio frequency energy and has not been tested
for compliance with the limits of computing devices pursuant to subpart J of
part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other en-
vironments may cause interference with radio communications, in which case
the user at his own expense will be required to take whatever measures may
be required to correct this interference.

Summary of Contents for DAC5652

Page 1: ...2005 Wireless Infrastructure User s Guide SLAU139A...

Page 2: ...ute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual pro...

Page 3: ...handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s r...

Page 4: ...If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C The EVM is de...

Page 5: ...Information About Cautions and Warnings This book may contain cautions and warnings This is an example of a caution statement A caution statement describes a situation that could potentially damage y...

Page 6: ...the limits of computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in o...

Page 7: ...scription 2 1 2 1 Schematic Diagram 2 2 2 2 Circuit Function 2 2 2 2 1 Input Clock 2 2 2 2 2 Input Data 2 2 2 2 3 Output Data 2 3 2 2 4 Internal Reference Operation 2 4 2 2 5 External Reference Operat...

Page 8: ...2 Layer 2 Ground Plane 3 3 3 3 Layer 3 Power Plane 3 4 3 4 Layer 4 Bottom Layer 3 5 Tables 1 1 Device List 1 2 2 1 Input Connector J1 2 2 2 2 Input Connector J10 2 3 2 3 Transformer Output Configurati...

Page 9: ...the DAC5672 62 52 evaluation module EVM and provides a general description of the features and functions to be considered while using this module Topic Page 1 1 Purpose 1 2 1 2 EVM Basic Functions 1 2...

Page 10: ...upplies In addition to the internal bandgap reference provided by the DAC5672 62 52 device options are provided on the EVM to allow external reference to be provided to the DAC 1 3 Power Requirements...

Page 11: ...e clock source driving CLK_1 WRT_1 CLK_2 and WRT_2 from WRT_1 input R14 R16 R19 R24 R26 R28 and J4 J8 not installed Transformer coupled outputs using transformer T1 and T2 The converter is set to oper...

Page 12: ...1 4...

Page 13: ...cription This chapter gives the circuit description including input clock input data output data reference operations and sleep mode operation Topic Page 2 1 Schematic Diagram 2 2 2 2 Circuit Function...

Page 14: ...rd configuration 2 2 2 Input Data The DAC5672 62 52 EVM can accept 3 3 V CMOS logic level data inputs through the 34 pin headers J9 and J10 per Table 2 1 and Table 2 2 The user can provide series damp...

Page 15: ...led Signal Output The factory set configuration of the demonstration board provides the user with a single ended output signal at SMA connector J5 The DAC5672 62 52 is configured to drive a doubly ter...

Page 16: ...reference may be considered for applications that require higher accuracy and drift performance or to add the ability of dynamic gain control The reference input has a high impedance and can easily b...

Page 17: ...Description and Parts List This chapter describes the physcial characteristics and the PCB layout of the EVM and lists the components used on the module Topic Page 3 1 PCB Layout 3 2 3 2 Parts List 3...

Page 18: ...yout 3 2 3 1 PCB Layout The EVM is constructed on a 4 layer 5 1 inch x 4 8 inch 0 062 inch thick PCB using FR 4 material Figure 3 1 through Figure 3 4 show the PCB layout for the EVM Figure 3 1 Top La...

Page 19: ...PCB Layout 3 3 Physical Description and Parts List Figure 3 2 Layer 2 Ground Plane...

Page 20: ...PCB Layout 3 4 Figure 3 3 Layer 3 Power Plane...

Page 21: ...PCB Layout 3 5 Physical Description and Parts List Figure 3 4 Layer 4 Bottom Layer...

Page 22: ...tor 1 16 W 1 4 ERJ 3EKF49R9V Panasonic R3 R4 R5 R6 2 k resistor 1 16 w 1 2 ERJ 3EKF1001V Panasonic R1 R2 49 9 resistor 1 16 W 1 1 ERJ 2RFK49R9X Panasonic R20 R14 R16 R19 51 resistor pack 4 CTS RP5 RP8...

Page 23: ...4 1 Schematics Schematics The following pages contain the schematics for the EVM Chapter 4...

Page 24: ...9 DA4 10 DA3 11 DA2 12 DA1 13 DA0 LSB 14 DGND 15 DVDD 16 WRTA WRTIQ 17 CLKA CLKIQ 18 CLKB RESETIQ 19 WRTB SELECTIQ 20 DGND 21 VFUSE 22 DB13 MSB 23 DB12 24 DB11 25 DB10 26 DB9 27 DB8 28 DB7 29 DB6 30 D...

Page 25: ...27 28 29 30 31 32 33 34 J10 34PIN_IDC 3 3VA SLEEP MODE SLEEP MODE 3 ROW 30 PIN CONNECTOR SH 1 SH 1 SH 1 SH 1 NOTE 1 DO NOT INSTALL GSET GSET SH 1 1 2 3 4 5 6 7 8 RP5 51 1 2 3 4 5 6 7 8 RP6 51 1 2 3 4...

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