Texas Instruments CDCM61001, User Manual

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CDCM6100x
R84
150
W
C52
100 nF
R845
150 W
C57
100 nF
JP24
JP26
J26
J16 OUTP0
OUTN0
CDCM6100x
R84
150 W
C52
100 nF
R845
150
W
C57
100 nF
JP24
JP26
J26
J16 OUTP0
OUTN0
R86
100
(Optional)
W
Output Buffer Termination
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Figure 5. LVPECL Output Setup
LVDS Output Buffer: Remove jumpers J24 and J26. A 100- Ω resistor can be placed at the R85
placeholder, if necessary. If the output pair is connected to an oscilloscope through 50- Ω SMA cables,
then the oscilloscope 50- Ω to ground connection should take care of this termination, and the 100- Ω
resistor is no longer necessary. Figure 6 illustrates this output buffer configuration.
Figure 6. LVDS Output Setup
LVCMOS Output Buffer: This LVCMOS buffer typically has 30 Ω internal impedance. An external 22- Ω
series resistor is recommended for a 50- Ω impedance characteristic line. For an SMA connection to an
oscilloscope, the output can be connected as ac-coupled (using C52 and C58). A lower-than-expected
swing will be observed because the LVCMOS driver is not capable of driving a 50
Ω to ground load.
Figure 5 describes this connection interface.
7.2 Availability of Optional Output
An optional bypassed output (OSC_OUT) is only available if the PLL output(s) are chosen at an LVPECL
signaling level. J219 is the SMA placeholder for this output.
6 Low Phase Noise Clock Evaluation Module SCAU027B – March 2009 – Revised March 2011
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