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R0014-02

Length

Address

config

Payload

1 Byte

0–1 Bytes

(Length – (Length of A config)) Bytes

Address Index

Unused

NOA

SEQ

LSB

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

MSB

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Packet Format

25.8.2 Tx FIFO Packet Organization

Figure 25-11. Structure of Packets in the Tx FIFO

The structure of a packet in the Tx FIFO is shown in

Figure 25-11

. All packets start with a length byte,

regardless of whether a length byte is present on the air. The length is the number of bytes in the address,
config, and payload fields following the length byte, and it may be modified before being transmitted on the
air. If a fixed length is used, it is up to the MCU to ensure that the length is correct given the fixed length
expected by the receiver. If packets are longer than what can fit in the FIFO, packets must be written to
the FIFO while transmission takes place, either by DMA or directly by the MCU. Auto-commit and
auto-deallocate must then be enabled for the Tx FIFO in

RFFCFG

The address byte is placed after the length byte and is present if configured in

PRF_FIFO_CONF.TX_ADDR_CONF

. If it is included, the address is transmitted on the air as it is read from

the FIFO. If it is not included, but a config byte is included, the three LSBs of the config byte tell the index
n of

PRF_ADDR_ENTRYn

from which the address is inserted. If neither an address nor a config byte is

included, the address is inserted from

PRF_ADDR_ENTRY0.ADDRESS

The config byte following the length byte and optional address byte is present if configured in

PRF_FIFO_CONF.TX_ADDR_CONF

. This byte contains an address index which is used to determine the

address if no address byte is included as explained previously. If an address byte is included, the address
index is used to determine which address entry to read the configuration from, but the ADDRESS field in
that address entry is ignored. In auto mode, the NO_ACK bit (LSB) of the transmitted header is set to bit 5
of the config byte. If

PRF_ADDR_ENTRYn.CONF.FIXEDSEQ

, where n is the index of the address used, is

1, the SEQ field of the transmitted header is taken from the SEQ field (bits 6

–

7) of the config byte;

otherwise, the sequence number on the air is inserted from

PRF_ADDR_ENTRYn.SEQSTAT.SEQ

. If the

config byte is not included, the NO_ACK bit is always sent as 0 and

PRF_ADDR_ENTRYn.CONF.FIXEDSEQ

should be 0 (otherwise the SEQ field always remains 0).The

payload is transmitted as present in the FIFO.

25.8.3 Tx Buffers for ACK Payload

The hardware Tx FIFO is not used for ACK payload in Rx tasks in auto mode. Instead, an
acknowledgment packet for each address can be placed in one of two dedicated buffers for that address.
These two buffers constitute a FIFO capable of holding two packets. The buffers for the first two
addresses are placed in the RAM page normally used for the hardware Tx FIFO. These four buffers can
either be accessed from the Tx FIFO space at 0x6100 or by selecting page 7 through

RFRAMCFG

, but the

Tx FIFO registers should not be used. The other twelve buffers must be addressed from the configurable
radio memory bank through the

RFRAMCFG

Table 25-11

Table 25-11. Segments for Holding ACK Payload for Each Address Entry

Address Entry Number

Buffer Number

Setting of RFRAMCFG

Start Address

7 or X

0x6000 or 0x6100