ALL DECOUPLING
CAPS ARE AS
CLOSE TO THE
CHIP AS POSSIBLE
GND tied to CELL0
at connector via a
thick trace.
GPIO6
GPIO7
GPIO8
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CB8
CB9
CB10
CB11
CB12
CB13
CB14
CB15
COMHP
CB16
COMHN
COMLP
COMLN
NFAULT
TX
RX
BBN
BBP
VC16
VC15
VC14
VC13
VC12
VC11
VC10
VC9
VC8
VC7
VC6
VC5
VC4
VC3
VC2
VC1
VC0
DVDD
CVDD
AVDD
REFHP
BAT
LDOIN
NPNB
NEG5V
TSREF
BQ79616PAPQ1
GPIO5
57
GPIO4
58
GPIO1
61
GPIO6
56
BBN
63
BBP
64
62
FAULT
GPIO7
55
GPIO2
60
GPIO3
59
7
VC14
8
CB13
VC12
11
6
CB14
VC11
13
CB10
14
CB11
12
5
VC15
CB12
10
9
VC13
VC9
17
CB8
18
VC7
21
CB9
16
VC6
23
CB5
24
CB6
22
VC10
15
CB7
20
VC8
19
REFHP
37
AVDD
38
40
COMLP
REFHM
36
42
COMHN
43
COMHP
41
COMLN
VC0
35
44
NEG5V
AVSS
39
LDOIN
47
NPNB
48
TSREF
51
CVSS
46
TX
53
GPIO8
54
RX
52
CVDD
45
DVSS
50
DVDD
49
VC4
27
CB3
28
VC2
31
CB4
26
VC1
33
CB0
34
CB1
32
VC5
25
CB2
30
VC3
29
1
BAT
3
VC16
4
CB15
2
CB16
PAD
65
U1
10nF
C5
GND
GND
1µF
C6
1µF
C9
4.7µF
C7
1µF
C8
1µF
C2
GND
GND
GND
GND
0.1uF
C3
GND
GND
VC0
VC1
VC2
VC3
VC4
VC5
VC6
VC7
VC8
VC9
VC10
VC11
VC12
VC13
VC14
VC15
VC16
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CB8
CB9
CB10
CB11
CB12
CB13
CB14
CB15
CB16
COMHP
COMHN
COMLP
COMLN
30.0
PWR
R5
Green
PWR
1
2
D1
1
2
J6
GND
1.0k
R121
GND
LDOIN
100
R3
200
R4
0.22µF
C1
GND
PWR
NPN Power Supply
TP14
GND
GND
TP13
GND
DVDD
BBN
NFAULT
Test Points
TP1
TSREF
TP2
LDOIN
TP3
NEG5V
TP4
NPNB
TP5
CVDD
TP6
AVDD
TP7
REFHP
TP8
BAT
TP43
NFAULT
TP11
BBN
TP10
BBP
TP9
DVDD
BBN
BBP
402
R9
402
R12
0.47uF
C10
0
R24
DNP
0
BBN_CELL
BBP_CELL
BBP_CELL
BBN_CELL
R23
DNP
0
R28
0
DNP
R27
DNP
V
C
1
6
V
C
1
5
V
C
1
4
V
C
1
3
V
C
1
2
0
R22
DNP
0
R26
DNP
C
B
1
6
C
B
1
5
0
R21
DNP
0
R25
DNP
C
B
1
4
C
B
1
3
C
B
1
2
Resistors for Lower Cell Count
Applications (614, 612)
BBP/BBN Bus Bar
TP16
TP17
0
R13
0
DNP
R10
DNP
BBN
BBP
0.47uF
DNP
C11
TP19
SRN_S
TP18
SRP_S
SRP/SRN
Current Sense
GPIO8_R
GPIO5_R
GPIO6_R
GPIO7_R
GPIO4_R
GPIO3_R
GPIO2_R
GPIO1_C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
J4
GPIO8
GPIO6
GPIO7
GPIO5
GPIO4
GPIO2
GPIO1
GPIO3
2
1
J5
TSREF
Jumpers to connect GPIOs to
resistor divider and thermistor for
temperature measurements.
Jumpers to connect TSREF to
ratiometric circuit.
Low side NTC circuit.
10k
t°
RT7
10k
t
°
RT5
10k
t
°
RT4
10k
t
°
RT2
10k
t
°
RT6
10k
t
°
RT1
10k
t
°
RT8
10k
t°
RT3
10.0k
R11
10.0k
R19
10.0k
R8
10.0k
R18
10.0k
R7
10.0k
R16
10.0k
R15
10.0k
R14
GND
PULLUP
PULLUP
GPIO1_R
GPIO2_R
GPIO3_R
GPIO4_R
GPIO5_R
GPIO6_R
GPIO7_R
GPIO8_R
GPIOs
C12
DNP
1uF
100k
R20
DNP
3
DNP
1
Q2
2
,4
NPNB
R17
DN
0
P
2
3
1
Q1
NPNB
BAT
REFHP
BBP
AVDD
TSREF
LDOIN
NEG5V
NPNB
CVDD
GND
TP15
GND
GND
5
4
3
2
1
6
J3
UART Communication
1
J3 Pin Desc ription
5 TX - to microcontroller UART RX
4 RX - to microcontroller UART TX
2 FAULTn - to microcontroller GP IO
1 GND - shared GND with microcontroller
2
J1
T
X
1
2
J2
100k
R2
CVDD
NFAULT
100k
R120
1
3
5
7
9
J17A
100
R119
R
X
_
C
2
4
6
8
1
0
J17B
0.1uF
C59
0.1uF
C4
GND
R
X
INA
3
J17 Pin Des cription
8 TX - to microcontroller UART RX
7 RX - to microcontroller UART TX
3 FAULTn - to microcontroller GP IO
5 GND - shared GND with microcontroller
6 USB2ANY 3.3V
INB
4
INC
12
IND
11
OUTA
14
OUTB
13
OUTC
5
OUTD
6
7
EN1
EN2
10
1
VCC1
VCC2
16
GND1
2
9
GND2
8
GND1
GND2
15
U2
ISO7342CQDWRQ1
GND_ISO
0.1uF
C57
0.1uF
C58
USB2ANY_TX_3.3
100k
R123
GND_ISO
1.0k
R128
GPIO1_R
TP42
TX
TP12
RX
CVDD
NFAULT_C
CVDD_CO
NFAULT_C
USB2ANY_3.3V
U
S
B
2
A
N
Y
_
T
X
_
3
.3
USB2ANY_RX_3.3
U
S
B
2
A
N
Y
_
3
.3
V
CVDD_CO
TX
RX_CO
NF_J
GND
GND_ISO
RX
TX
U
S
B
2
A
N
Y
_
R
X
_
3
.3
USB2ANY_3.3V
1
2
J18
GND
GND
1
2
J21
RX
1uF
C60
GND
TP44
GPIO1_R
24V
1
3
2
D3
NF_J
Figure 7-2. BQ79616EVM Schematic Part 1
BQ79616EVM Schematic, Assembly, Layout, and BOM
20
BQ79616-Q1, BQ75614-Q1, and BQ79656-Q1 Evaluation Modules
SLUUC37B – JULY 2019 – REVISED OCTOBER 2020
Copyright © 2020 Texas Instruments Incorporated