2P
1P
1N
4P
3P
Sys Pres
PACK-
PACK+
BAT
CHG
DSG
FUSEPIN
FUSE
1
1
IC ground should be connected to the 1N cell tab.
Place RT1 close to Q2 and Q3.
2
SMBC SMBD
2
Wake
LED3
LED5
LED2
LED4
LED1
0.1uF
C8
0.1uF
C10
1
2
G
N
D
S
ID
E
1
2
G
N
D
S
ID
E
1
2
G
N
D
S
ID
E
1
2
G
N
D
S
ID
E
1
2
3
4
J2
100
R25
100
R27
200
R24
200
R26
10K
RT2
100
R30
100
R31
DNP
C19
DNP
C20
0.1uF
C18
0.001
R19
0.1uF
C12
1
2
3
J3
1
2
3
J5
1
2
J1
100
R20
100
R21
100
R22
100
R23
0.1uF
C14
0.1uF
C15
0.1uF
C16
0.1uF
C17
2.2uF
C13
BAT54HT1G
D1
0.1uF
C4
0.1uF
C5
0.1uF
C9
0.1uF
C11
1K
R18
0.1uF
C6
0.47µF
C7
Si1414DH
1
2
3
4
5
6
Q5
51K
R6
0.1uF
C3
1
2
3
SFDxxxx
F1
5.1K
R16
5.1K
R17
5.1K
R7
5.1K
R8
100
R9
5.1K
R10
10K
R12
10M
R2
10M
R3
10M
R5
0.1uF
C1
0.1uF
C2
Si7114DN
1
2
3
4
5
Q2
Si7114DN
1
2
3
4
5
Q3
300
R1
2N7002K
1
2
3
Q4
10K
R4
10K
RT3
10K
RT4
10K
RT5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M
M
3
Z5
V
6
C
D2
M
M
3
Z5
V
6
C
D3
FDN358P
1
3
2
Q1
10K
R32
GND
GND
CHGND
CHGND
GND
GND
GND
GND
GND
CHGND
GND
AGND
AGND
4P
PACK+
4P
PACK+
GND
S1
S2
D5
D6
D7
D9
D8
NT1
Net-Tie
PACK-
PACK+
LED DISPLAY
1
1
1
2
J6
10K
RT1
1
1
1K
R13
1K
R14
1K
R15
100
R11
VSS
SMBD
SMBC
3
Replace D1 and R9 with a 10 ohm resistor for single cell applic
ations
3
3
TP11
5.1
R33
VDD
1
V4
2
V3
3
V2
4
V1
5
VSS
6
REG
7
OUT
8
PWPD
9
U2
BQ296103DSGR
GND
GND
1
2
J4
PRES / SHUTDOWN
BTP_INT
1K
R29
200
R28
M
M
3
Z5
V
6
C
D4
GND
S3
GND
DNP
C21
SHUTDOWN
PRES / SHUTDOWN
SRP
1
1
SRN
1
1
PBI
1
VC4
2
VC3
3
VC2
4
VC1
5
SRN
6
NC
7
SRP
8
VSS
9
TS1
10
TS2
11
TS3
12
TS4
13
NC
14
BTP_INT
15
PRES/SHUTDN
16
DISP
17
SMBD
18
SMBC
19
LEDCNTLA
20
LEDCNTLB
21
LEDCNTLC
22
PTC
23
PTCEN
24
FUSE
25
VCC
26
PACK
27
DSG
28
NC
29
PCHG
30
CHG
31
BAT
32
PAD
33
U1
BQ4050RSMR
Copyright © 2016, Texas Instruments Incorporated
Circuit Module Physical Layout, Bill of Materials and Schematic
16
SLUUBF9 – March 2016
Copyright © 2016, Texas Instruments Incorporated
bq4050EVM-561 Evaluation Module
4.3
Schematic
illustrates the schematic for the EVM.
Figure 17. bq4050EVM Schematic