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End-Of-Service Determination

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SLUUBE8 – September 2018

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Copyright © 2018, Texas Instruments Incorporated

General Description

1.3.3.5

Learn Post-Relax Phase

After the Learn Discharge Phase completes, the bq34210-Q1 device will disable the learning current and
enter the Learn Post-Relax Phase, whereby the device again waits for relaxation of the cell, during which

Voltage()

is monitored for 100-s time windows. While in this phase, the device sets the

[LRLX]

flag. If the

change in the consecutive 100-s averages of

Voltage()

is less than 4 µV, then relaxation is deemed

achieved. If not, the device continues monitoring for another 100-s time window. It is important that the cell
be fully relaxed before the algorithm can continue. The status of relaxation can be seen by the

[REST]

bit

in the Gauging Status register. If a learning fault occurs while in the Learn Post-Relax Phase, the status
flag (

[LRLX]

in this case) remains set to enable the host to understand what mode the system was in

when the fault occurred.

As in the Learn Pre-Relax Phase, if a discharge current in excess of

Discharge Detection Threshold

or

a charging current in excess of

Charge Detection Threshold

is detected, then the

[LUCD]

flag is set.

This detection also terminates the learning phase, and this flag will remain set so the host can recognize
why the learning phase was stopped. This bit will be reset to 0 when charging is terminated or the register
is read.

At the completion of the Learn Post-Relax Phase, if in CHARGE-BEFORE-DISCHARGE mode and

Voltage()

> the charging voltage determined by the selected charging algorithm and

[LVR]

= 1, then the

device will set

[LDSG]

and enable the

Learn Discharge Current

until

Voltage()

the calculated charging

voltage. At which point,

[LDSG]

is reset and the

Learn Discharge Current

is disabled. The

[LRSTOR]

bit

will be set while the device is continuing discharge to reach the calculated charging voltage.

If in DISCHARGE-BEFORE-CHARGE mode and

[LVR]

= 0, then the device will set

[LDONE]

and

complete learning. If

[LVR]

= 1, then the device will initiate a new charging session to charge the battery

back to the appropriate charging voltage determined by the selected charging algorithm using a similar
sequence as described above. In this case, the device sets the

[LCHG]

and

[LRSTOR]

flags to indicate to

the host that charging can begin. If charging does not terminate within

Learn Charge Time Limit

, then

[LCTO]

and

[LFAULT]

is set. If a learning fault does occur, the status flag (

[LCHG]

in this case) will remain

set to allow the host to understand what mode the system was in when the fault occurred.

NOTE:

It is possible that a Learn Discharge Phase has completed, and a new

Rcell

value was

calculated and stored, but during a Voltage Restore phase, a fault could occur. This would
cause

[LFAULT]

to be set, and the device would retry a new learning phase after

Auto

Learn Retry Time

.

1.3.3.6

Cell Resistance Calculation

The device uses the values obtained during each learning phase to estimate a value of

Rcell

for the

battery. Note the actual value of this

Rcell

estimate is not critical here, rather its change as the battery

ages is what is important. The

[LRES]

bit indicates when a new

Rcell

value was acquired and stored by

the device.

The change in value of

Rcell

must be normalized relative to differences in temperature when they are

captured. Therefore, the bq34210-Q1 device uses resistance temperature parameters in

Rcell High &

Low Temperature Coefficients

to calculate an expected value of resistance at the

Learn Target

Temperature

.

The

Rcell High & Low Temperature Coefficients

are obtained during a preproduction test whereby the

customer initiates

Initial Rcell

calculations at temperatures of 5°C, 25°C, and 40°C. These

Initial Rcell

values are put into a spreadsheet provided by TI, which then calculates the values of

Rcell High

Temperature Coefficient

and

Rcell Low Temperature Coefficient

. These values are then loaded into

data memory and used by the device to normalize effective

Rcell

measurements back to an equivalent

value at the

Learn Target Temperature

.

Summary of Contents for bq34210-Q1

Page 1: ...bq34210 Q1 Technical Reference Manual Literature Number SLUUBE8 September 2018 ...

Page 2: ... Smoothing Config Register 21 1 3 3 End Of Service Determination Detailed Description 21 2 Functional Description 31 2 1 Device Configuration 31 2 1 1 Smoothing Config Register 31 2 1 2 Operation Configuration A Operation Config A Register 31 2 2 External Pin Functions 32 2 2 1 Wake Up Comparator 32 2 2 2 Autocalibration 32 2 3 Temperature Measurement 33 2 3 1 Overtemperature Indication 33 2 3 2 U...

Page 3: ...20 R1 42 2 9 21 TC 42 2 9 22 C1 42 2 9 23 Age Factor 42 2 9 24 Fixed EDV0 42 2 9 25 Fixed EDV1 42 2 9 26 Fixed EDV2 42 2 9 27 Battery Low 42 2 9 28 Learning Low Temp 42 2 9 29 Overload Current 42 2 9 30 Self Discharge Rate 42 2 9 31 Electronics Load 42 2 9 32 Near Full 42 2 9 33 Reserve Capacity 43 2 9 34 Charge Efficiency Chg Eff 43 2 9 35 Discharge Efficiency Dsg Eff 43 2 9 36 Depth of Discharge...

Page 4: ... 0x0009 54 4 1 5 CC_OFFSET 0x000A 54 4 1 6 CC_OFFSET_SAVE 0x000B 54 4 1 7 SET_PROFILE_1 0x0015 54 4 1 8 SET_PROFILE_2 0x0016 54 4 1 9 SHUTDOWN_ENABLE 0x001B 54 4 1 10 SHUTDOWN 0x001C 54 4 1 11 ACCUM_DSG_EN 0x001E 54 4 1 12 ACCUM_CHG_EN 0x001F 54 4 1 13 IGNORE_SELFDSG_EN 0x0020 55 4 1 14 PIN_CONTROL_EN 0x0022 55 4 1 15 CAL_TOGGLE 0x002D 55 4 1 16 SEAL 0x0030 55 4 1 17 EOS_START_LEARN 0x0039 55 4 1 ...

Page 5: ...2C and 0x2D 60 4 19 StateOfHealth 0x2E and 0x2F 60 4 20 ChargingVoltage 0x30 and 0x31 60 4 21 ChargingCurrent 0x32 and 0x33 60 4 22 BLTDischargeSet 0x34 and 0x35 60 4 23 BLTChargeSet 0x36 and 0x37 60 4 24 OperationStatus 0x3A and 0x3B 61 4 25 DesignCapacity 0x3C and 0x3D 61 4 26 ManufacturerAccessControl 0x3E and 0x3F 61 4 27 MACData 0x40 through 0x5F 61 4 28 MACDataSum 0x60 61 4 29 MACDataLen 0x6...

Page 6: ...eaking spaces for example Design Capacity Register bits and flags italics and brackets for example TDA Data memory bits italics and bold for example LED1 Modes and states ALL CAPITALS for example UNSEALED Trademarks MathCAD is a trademark of MathSoft Inc All other trademarks are the property of their respective owners Glossary http www ti com provides a Battery Glossary on the Battery Management F...

Page 7: ...vailable to the system can be maintained above a preselected level to avoid compromising the ability for the battery to support a system discharge event Information is accessed through a series of commands called Data Commands and indicated by the general format Command Read and write information within the device control and status registers as well as its data memory locations are accessed throu...

Page 8: ...play a factor of the true value the system must go through a full charge and then a full discharge cycle before the correct full charge capacity FCC is estimated The main charge counter RemainingCapacity RC register represents the available capacity or energy in the battery at any given time The bq34210 Q1 device adjusts RC for charge self discharge and other compensation factors The information i...

Page 9: ... has dropped to Battery Low FCC The bq34210 Q1 device sets VDQ 1 in OperationStatus when a discharge begins The bq34210 Q1 device sets VDQ 0 if any disqualifying condition occurs One complication may arise regarding the state of VDQ if CSYNC is set in CEDV Gauging Configuration When CSYNC is enabled RemainingCapacity is written to equal FullChargeCapacity on valid primary charge termination This c...

Page 10: ...is programmed in mV in the CEDV profile EMF ILOAD is the current discharge load magnitude n the number of series cells In the bq34210 Q1 case n 1 FBL is the factor that adjusts the EDV voltage for battery capacity and temperature to match the no load characteristics of the battery FBL f C0 C C1 T 2 C either 0 3 or Battery Low for EDV0 EDV1 and EDV2 respectively and C0 are the capacity related EDV ...

Page 11: ... sc technical support email tech support asp AAP for more detailed information 1 1 7 Self Discharge The bq34210 Q1 device estimates the self discharge of the battery to maintain an accurate measure of the battery capacity during periods of inactivity The bq34210 Q1 device makes self discharge adjustments to RC every 1 4 second when awake and periodically when in SLEEP mode The period is determined...

Page 12: ...During battery capacity learning learned Full Charge Capacity and DOD at EDV2 will be learned and updated The determined value of remaining capacity can be further scaled if needed through the value of RemCap Init Percent Upon a reset the final value of RemainingCapacity is initialized from the RemCap Init Percent value of the initial value correlated to the battery voltage table 1 1 10 Fuel Gauge...

Page 13: ...t will be set Smoothing deactivates whenever an EDV threshold is reached until the rate to the next EDV threshold can be calculated however smoothing past the EDV2 point only occurs if Smoothing Config SMEXT is set to 1 To improve smoothing at the end of discharge the SME0 configuration bit provides additional flexibility This is particularly useful when FIXED_EDV0 is set and the calculated EDV2 E...

Page 14: ...CCHG_EN and ACDSG_EN configuration bits If both ACCHG_EN and ACDSG_EN are reset then the timer is halted These bits can be set using the ACCUM_CHG_EN and ACCUM_DSG_EN commands When the cell is fully charged and the FC bit is set due to normal charge termination then the integration counter is again reset At this point the values of Accumulated Charge and time just before reset are stored and can b...

Page 15: ...bit and sets several timers to short time durations The learning phase can be implemented in two ways which are controlled by the LSM bit a CHARGE BEFORE DISCHARGE The system begins a Learn Charge Phase where it enables charging to a voltage given by the charging voltage determined by the selected algorithm JEITA for example incremented by Learn Charge Voltage Delta This increases charging from th...

Page 16: ... if Rcell Initial Rcell DRD Warning Level b Resistance Slope Decisioning This method uses the changes with respect to time of Rcell comparing this to programmable thresholds to generate an alert and a warning Use of Resistance Slope Decisioning RSD requires an accurate measurement of the time between consecutive learning phases for calculation of the slope of Rcell change with respect to time This...

Page 17: ...bled default 1 Enabled CHG Enables BatteryStatus CHG 0 Disabled default 1 Enabled DSG Enables BatteryStatus DSG 0 Disabled default 1 Enabled 1 3 1 2 Alert_1 Config This register matches the Battery Status register high byte Table 1 5 Alert_1 Config Register Bit Definitions Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RSVD SOCLOW UTC UTD OTC OTD BATHIGH BATLOW Default 0 0 0 0 0 0 0 0 0x00 RSVD R...

Page 18: ...t 1 Bit 0 LCT0 LFAULT LABRT LCMD LPER LRLX LCHG LDSG Default 0 0 0 0 0 0 0 0 0x00 LCT0 Enables EOSLearnStatus LCT0 0 Disabled default 1 Enabled LFAULT Enables EOSLearnStatus LFAULT 0 Disabled default 1 Enabled LABRT Enables EOSLearnStatus LABRT 0 Disabled default 1 Enabled LCMD Enables EOSLearnStatus LCMD 0 Disabled default 1 Enabled LPER Enables EOSLearnStatus LPER 0 Disabled default 1 Enabled LR...

Page 19: ...LEDGE Enables EOSLearnStatus LCTLEDGE 0 Disabled default 1 Enabled LUCD Enables EOSLearnStatus LUCD 0 Disabled default 1 Enabled LDPAM Enables EOSLearnStatus LDPAM 0 Disabled default 1 Enabled LDPAT Enables EOSLearnStatus LDPAT 0 Disabled default 1 Enabled LDPAI Enables EOSLearnStatus LDPAI 0 Disabled default 1 Enabled 1 3 1 5 Alert_4 Config This register matches the EOS Status register Table 1 8 ...

Page 20: ...the Alert_5 Config register match the EOS Safety Status register s low byte Bits 3 0 Table 1 9 Alert_5 Config Register Bit Definitions Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RSVD RSDLWARN RSDWARN DRDWARN RSVD RSDL ALERT RSDALERT DRDALERT Default 0 0 0 0 0 0 0 0 0x00 RSVD Reserved RSDLWARN Enables EOSSafetyStatus RSDLWARN 0 Disabled default 1 Enabled RSDWARN Enables EOSSafetyStatus RSDWARN...

Page 21: ...nabled 1 End of charge smoothing is enabled default SMEXT When set to 1 smoothing continues to EDV1 and EDV0 points When set to 0 smoothing stops at EDV2 Default is 0 VAVG Enables smoothing to use average voltage When set to 1 smoothing uses average voltage When set to 0 smoothing uses measured voltage Default is 0 SMEN Smoothing result is reported on RemainingCapacity When set to 1 the smoothing ...

Page 22: ...harge Voltage Tx Ty when set 1 or to simply stop discharge when the timer reaches Learn Discharge Time when set 0 1 The device continues Learn Discharge Phase until Voltage reaches the appropriate Last Charge Voltage Tx Ty 0 The device stops Learn Discharge Phase when the timer reaches Learn Discharge Time default LSM Learn Sequence Mode Control This bit determines whether the EOS algorithm uses C...

Page 23: ...ain attempt a learning phase Note that this will occur whether the device is configured in periodic learning or learning is initiated through a host command If the case occurs where an alert or warning is detected either through Direct Resistance Decisioning or Resistance Slope Decisioning the Alert Warn Learn Time is used to schedule a new learning phase If multiple fault events must be detected ...

Page 24: ...n Discharge Phase If a learning fault occurs while in the Learn Pre Relax Phase or the Learn Post Relax Phase the status flag LRLX in this case will remain set to enable the host to understand what mode the system was in when the fault occurred When the device is in learning mode but not in the Learn Discharge Phase and a current is detected differently than what is expected the LUCD bit will be s...

Page 25: ...to Learn Request Timeout seconds and start the timer only when the current has entered the acceptable range around Learn Discharge Current This will accommodate delay in the host responding to the ALERT interrupt to see the LCTLEDGE signal and enable the Learn Discharge Current If the bq34210 Q1 device does not detect a valid current within a time period of Learn Request Timeout after setting LDSG...

Page 26: ...in DISCHARGE BEFORE CHARGE mode and LVR 0 then the device will set LDONE and complete learning If LVR 1 then the device will initiate a new charging session to charge the battery back to the appropriate charging voltage determined by the selected charging algorithm using a similar sequence as described above In this case the device sets the LCHG and LRSTOR flags to indicate to the host that chargi...

Page 27: ... a warning based on the DRD algorithm In normal situations the value of Rcell is expected to increase over time If the value of Rcell is detected to decrease from the previous measurement this is unexpected and may indicate an abnormal situation such as a cell having been replaced The bq34210 Q1 device will set the RCELLR flag if a reduction in the value of Rcell of more than 2 is detected To offe...

Page 28: ...value will only be valid if no power cycles or interruptions to device operation have been encountered since the Initial RRate learning phases were completed If there is a power cycle such that the timer was interrupted then the RDSLI flag will be set which indicates that no alerts or warnings based on the long term RSD value described below will be triggered A long term value for the resistance s...

Page 29: ...ases and calculate a valid RRate value for evaluation The device can then be powered down until another evaluation is needed in which case the sequence can be repeated 1 3 3 8 Initial Rcell and RRate Learning Process When the cell is first put into service Initial Learn Pulse Number learning phases will be initiated each resulting in a calculated Rcell value These Rcell values will be averaged and...

Page 30: ...initial learn pulses being captured at slightly different depth of discharge which can introduce an additional error into the measurement depending on the battery chemistry used To avoid this error it is recommended that either the Learn Voltage Restore be set 1 or the Initial Learn Pulse Number be set 1 Because the Learn Discharge Pulses only discharge the battery a small amount recharging to com...

Page 31: ... enabled default SMEXT When set to 1 smoothing continues to EDV1 and EDV0 points When set to 0 smoothing stops at EDV2 Default is 0 VAVG Enables smoothing to use average voltage When set to 1 smoothing uses average voltage When set to 0 smoothing uses measured voltage Default is 0 SMEN Smoothing result is reported on RemainingCapacity When set to 1 the smoothing result is reported on RemainingCapa...

Page 32: ...nction See the bq34210 Q1 Automotive 1 Series Cell System Side CEDV Fuel Gauge for Rarely Discharged Batteries Data Sheet SLUSCG1 for threshold values 2 2 External Pin Functions 2 2 1 Wake Up Comparator The wake up comparator indicates a change in cell current while the fuel gauge is in SLEEP mode The Operation Config A WK_TH1 WK_TH0 bits select the appropriate comparator threshold for the sense r...

Page 33: ... Temperature reaches the threshold of OT Dsg for a period of OT Dsg Time and Current Dsg Current Threshold then the BatteryStatus OTD bit is set When Temperature falls to OT Dsg Recovery the BatteryStatus OTD bit is cleared If OT Dsg Time 0 then the feature is completely disabled 2 3 2 Undertemperature Indication 2 3 2 1 Undertemperature Charge UT Chg If during charging Temperature reaches the thr...

Page 34: ...hreshold BatteryStatus SOCLOW 0 Trip RelativeStateOfCharge SOC Low Threshold BatteryStatus SOCLOW 1 Recovery RelativeStateOfCharge SOC Low Recovery BatteryStatus SOCLOW 0 2 4 4 Battery Level Threshold The battery level threshold BLT feature indicates when the SOC of a battery pack has depleted to a certain value set in a DF register This feature allows a host to program two capacity based threshol...

Page 35: ...rrent Taper Current During the same two periods the accumulated change in capacity must be 0 25 mAh Voltage Charging Voltage Taper Voltage When this occurs the BatteryStatus FC and TCA bits are set depending on the SOC Flag Config A FCSETVCT and TCSETVCT options Also if the CEDV Configuration CSYNC bit is set then RemainingCapacity is set equal to FullChargeCapacity 2 5 2 Charge Inhibit The fuel g...

Page 36: ...ent is detected above 30 mA Host sets Operation Config A SLEEP 0 Sleep Current AverageCurrent The ALERT pin is raised high for t Control EXIT_CFG_UPDATE Via 240 s timeout Host can change RAM No gauging in this mode Control ENTER_CFG_UPDATE ALERT Power Modes www ti com 36 SLUUBE8 September 2018 Submit Documentation Feedback Copyright 2018 Texas Instruments Incorporated Functional Description In SLE...

Page 37: ...r tALERT Both SHUTDOWN_ENABLE and SHUTDOWN are only available while unsealed Sending SHUTDOWN_ENABLE will set SHUTDOWN_EN in CONTROL_STATUS Sending SHUTDOWN while SHUTDOWN_EN is set will cause the device to immediately shut down Sealing the gauge will clear SHUTDOWN_EN Once in SHUTDOWN mode there are two methods to exit A power cycle battery removal and insertion is one method The second method us...

Page 38: ...omb counter Use calibration routines to set this value 2 9 1 2 CC Delta CC Delta sets the mAh capacity scale factor for the coulomb counter Use calibration routines to set this value 2 9 2 Coulomb Counter Offset CC Offset This register value stores the coulomb counter offset compensation It is set by automatic calibration of the device 2 9 3 Board Offset This register value stores the compensation...

Page 39: ...band This constant defines the deadband voltage for the measured voltage between the SRP and SRN pins used for capacity accumulation in units of 294 nV Any voltages within CC Deadband do not contribute to capacity accumulation 2 9 13 SOC Flag Configuration A SOC Flag Config A Register The settings in SOC Flag Config A configure how the TC FC and TD flags in GaugingStatus set and clear These flags ...

Page 40: ...C Flag Configuration B SOC Flag Config B Register Table 2 8 SOC Configuration Flag B Register Bit Definitions Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 FCCCLEAR RSOC FCSET RSOC FCCLEARV FCSETV FDCLEAR RSOC FDSET RSOC FDCLEARV FDSETV Default 1 0 0 0 1 1 0 0 0x8C FCCLEARRSOC Enables BatteryStatus FC flag clear when RelativeStateOfCharge FC Clear RSOC Threshold 0 Disabled 1 Enabled default FCSE...

Page 41: ...rved FCC_LIMIT Learned FCC is not allowed to be higher than DesignCapacity Enabled when set RSVD Reserved FIXED_EDV0 This bit is used when EDV_CMP 1 to determine if EDV0 will use a fixed threshold When set to 1 FIXED_EDV0 will be used When set to 0 dynamic EDV0 will be used default SC This is a selection for learning cycle optimization for a smart charger or independent charger 0 Learning Cycle op...

Page 42: ...sate for cell aging 2 9 24 Fixed EDV0 This value is the EDV0 threshold if CEDV is clear in CEDV Config 2 9 25 Fixed EDV1 This value is the EDV1 threshold if CEDV is clear in CEDV Config 2 9 26 Fixed EDV2 This value is the EDV2 threshold if CEDV is clear in CEDV Config 2 9 27 Battery Low Battery Low sets the EDV2 level the highest of the EDV voltages 2 9 28 Learning Low Temp This value specifies th...

Page 43: ...Discharge DOD at EDV2 This value is updated by the CEDV gauging algorithm when battery voltage reaches EDV2 If Battery Low is altered the DOD at EDV2 value should be set to 1 Battery_Low 16384 where Battery_Low Battery Low 100 The firmware default value is 15232 which corresponds to a Battery Low 703 01 2 9 37 Design Capacity The DesignCapacity function reports Design Capacity mAh NOTE There is on...

Page 44: ...ging voltage battery The bq34210 Q1 device includes multiple algorithms for charging and charge termination including JEITA based charging negative temperature based charging and negative delta voltage based charging The ChargingVoltage and ChargingCurrent will be selected by the bq34210 Q1 device following the JEITA method depending on the JEITA bit setting If this bit is set the voltage and curr...

Page 45: ...ger times may be used for increased slope resolution In addition to the ΔT Δt timer a holdoff timer starts using Holdoff Time when the battery is charged at more than Holdoff Current default is 240 mA and the temperature is above Holdoff Temperature Until this timer expires ΔT Δt detection is suspended If Current drops below Holdoff Current or Temperature below Holdoff Temperature the holdoff time...

Page 46: ...mination could occur with the pulse charging method and with random starting and resumption of the charge current a condition that is important at the beginning or end of the qualification period 2 9 47 Taper Voltage During primary charge termination detection one of the three requirements is that Voltage must be above Charging Voltage Taper Voltage for the bq34210 Q1 device to start trying to qua...

Page 47: ...bq34210 Q1 device enters RELAXATION mode from DISCHARGE mode if Current goes above Quit Current for at least Discharge Relax Time NOTE To optimize power consumption it is recommended to set Discharge Relax Time to 0 so the device enters RELAXATION mode immediately when Current rises above Quit Current 2 9 58 Charge Relax Time The bq34210 Q1 device enters RELAXATION mode from CHARGE mode if Current...

Page 48: ...yStatus if the pack Temperature is equal to or higher than the Over Temp Dsg threshold 2 9 62 1 OT Discharge Time If the OTD condition exists for a time period that exceeds the OT Dsg Time the bq34210 Q1 device goes into an overtemperature discharge condition This function is disabled if OT Dsg Time is set to 0 In an overtemperature discharge condition the ChargingCurrent is set to 0 and the OTD b...

Page 49: ...x address and is fixed as 1010101 The first 8 bits of the I2 C protocol is therefore 0xAA or 0xAB for write or read respectively The quick read returns data at the address indicated by the address pointer The address pointer a register internal to the I2 C communication engine increments whenever data is acknowledged by the fuel gauge or the I2 C master Quick writes function in the same manner and...

Page 50: ...ing time must be inserted between all packets addressed to the fuel gauge In addition if the SCL clock frequency fSCL is 100 kHz use individual 1 byte write commands for proper data flow control The following diagram shows the standard waiting time required between issuing the control subcommand and reading the status result A DF_CHECKSUM subcommand requires 100 ms minimum prior to reading the res...

Page 51: ...K RW Voltage VOLT 0x08 and 0x09 mV R BatteryStatus 0x0A and 0x0B NA R Current Current 0x0C and 0x0D mAh R RemainingCapacity RC 0x10 and 0x11 mAh R FullChargeCapacity FCC 0x12 and 0x13 mAh R AverageCurrent AI 0x14 and 0x15 mA R AverageTimeToEmpty TTE 0x16 and 0x17 Minutes R AverageTimeToFull TTF 0x18 and 0x19 Minutes R AccumulatedCharge 0x1A and 0x1B mAh R AccumulatedChargeTime 0x1C and 0x1D 5 Minu...

Page 52: ... commands that require data such as data memory writes the subcommand can be written to either Control or ManufacturerAccessControl registers however it is recommended to write using the ManufacturerAccessControl registers as this allows performing the full command in a single I2 C transaction Table 4 2 Control MAC Subcommands CNTL MAC FUNCTION SUBCOMMAND CODE SEALED ACCESS DESCRIPTION CONTROL_STA...

Page 53: ...r CALIBRATION mode ENTER_CFG_UPDATE 0x0090 Yes Enter CONFIG UPDATE mode EXIT_CFG_UPDATE_REINIT 0x0091 Yes Exit CONFIG UPDATE mode and reinitialize EXIT_CFG_UPDATE 0x0092 Yes Exit CONFIG UPDATE mode without reinitialize An example using the DEVICE_NUMBER subcommand Write the data bytes 0x01 0x00 to the device address 0xAA starting at command 0x00 Then read the response using an incremental read To ...

Page 54: ...ZZRREE where ddDD Device Number vvVV Version bbBB Build number ttTT Firmware type 4 1 4 BOARD_OFFSET 0x0009 This command instructs the fuel gauge to measure and store the board offset value 4 1 5 CC_OFFSET 0x000A This command instructs the fuel gauge to measure the internal CC offset value 4 1 6 CC_OFFSET_SAVE 0x000B This command instructs the fuel gauge to store the internal CC offset value 4 1 7...

Page 55: ...AL bit is cleared 4 1 17 EOS_START_LEARN 0x0039 This MAC subcommand instructs the bq34210 Q1 device to begin a learning phase 4 1 18 EOS_ABORT_LEARN 0x003A This MAC subcommand instructs the bq34210 Q1 device to stop a learning phase 4 1 19 EOS_RCELL_RRATE_LEARN 0x003B This MAC subcommand instructs the bq34210 Q1 device to initiate an Initial Rcell and an Initial RRate measurement 4 1 20 EOS_WARN_C...

Page 56: ...et when in DISCHARGE or RELAXATION modes Clear when in CHARGE mode EDV Indicates if measured cell voltage is above or below EDV0 threshold Below true when set RSVD Reserved TC Terminate Charge Controlled by settings in SOC Flag Config A This flag is identical to BatteryStatus TCA TD Terminate Discharge Controlled by settings in SOC Flag Config A This flag is identical to BatteryStatus TDA FC Full ...

Page 57: ...perationStatus DFGUPDATE bit to 1 and enter CONFIG UPDATE mode This command is only available when the fuel gauge is UNSEALED NOTE To read the flag the host must wait at least 2 seconds 4 1 33 EXIT_CFG_UPDATE_REINIT 0x0091 This command instructs the fuel gauge to exit CONFIG UPDATE mode and the gauge is reinitialized 4 1 34 EXIT_CFG_UPDATE 0x0092 This command instructs the fuel gauge to exit CONFI...

Page 58: ... charging should not begin because Temperature is outside the range Charge Inhibit Temp Low Charge Inhibit Temp High True when set FD Full discharge is detected This flag is set and cleared based on the selected SOC Flag Config B options FC Full charged is detected This flag is set and cleared based on the selected SOC Flag Config A and SOC Flag Config B options TCA Terminate Charge Alarm This fla...

Page 59: ... AverageTimeToEmpty 0x16 and 0x17 This read only function returns an unsigned integer value of the predicted remaining battery life at the present rate of discharge in minutes A value of 65 535 indicates battery is not being discharged Table 4 9 AverageTimeToEmpty Name Access Protocol Type Min Max Unit SE US FA AverageTimeToEmpty R R R Word U2 0 65535 min 4 10 AverageTimeToFull 0x18 and 0x19 This ...

Page 60: ...entage DesignCapacity 4 18 RelativeStateOfCharge 0x2C and 0x2D This read only function returns an unsigned integer value of the predicted remaining battery capacity expressed as a percentage of FullChargeCapacity with a range of 0 to 100 RelativeStateOfCharge RemainingCapacity FullChargeCapacity rounded up to the nearest whole percentage point 4 19 StateOfHealth 0x2E and 0x2F The StateOfHealth SOH...

Page 61: ... voltage is above or below EDV2 threshold Below true when set SEC 1 0 Defines Current Security Access 11 Sealed Access 10 Unsealed Access 01 Full Access 00 Unused CALMD Toggles with 0x2D command to enable disable CALIBRATION mode 4 25 DesignCapacity 0x3C and 0x3D This read only function returns the value stored in Design Capacity mAh This is intended to be the theoretical or nominal capacity of a ...

Page 62: ... terminated for any reason other than a valid termination and also if any other fault such as in GaugingStatus or BatteryStatus occurred during the learning phase The bit will be reset to 0 when a new learning phase begins 1 A learning phase was stopped 0 A learning phase was not stopped LABRT Learn Abort on Command This bit is set 1 whenever a learning phase was stopped by the host A bit that was...

Page 63: ...d the computation of a new Rcell value during the present learning phase This bit is cleared when the learning phase is complete 1 A new value of Rcell was acquired 0 A new value of Rcell has not yet been acquired LRSTOR Learn Voltage Restore This bit is set 1 if whenever the Learn Discharge Phase is complete and the voltage can be restored back to its original level This bit is cleared when the l...

Page 64: ...hat was set 1 will be reset to 0 when a new Learn Discharge Phase begins 1 A Learn Discharge Phase was stopped 0 A Learn Discharge Phase was not stopped 4 31 EOSSafetySatus 0x66 and 0x67 This command returns flags generated by the EOS Determination function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 LSB RSVD RSVD RSVD RSVD RSVD RSDL ALERT RSDALERT DRDALERT MSB RSVD RSVD RSVD RSVD RSVD RSDLWAR...

Page 65: ...it 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SRRL SRCL RSVD LTI RSDLI RCELLR IRRCOMP IRCOMP Legend RSVD Reserved Do not use SRRL Initial RRate Learning in Progress This bit is set 1 if the bq34210 Q1 EOS Determination function begins the required learning phases to calculate a value of Initial RRate generally after an EOS_RCELL_RRATE_LEARN command was issued The bit will clear when the Initial RRate learnin...

Page 66: ... obtained 0 Initial RRate was not obtained IRCOMP Initial Rcell Calculation Complete This bit is set 1 if the bq34210 Q1 EOS Determination function has completed the required learning phases to calculate a value of Initial Rcell This bit is reset when a new Initial Rcell calculation is triggered until the new calculation is complete This bit can be written by the host through loading data flash if...

Page 67: ...nd equipment operation 5 2 Device Access Modes The fuel gauge provides two access modes UNSEALED and SEALED that control the data memory access permissions The default access mode of the fuel gauge is UNSEALED so the system processor must send a SEALED subcommand after a gauge reset to use the data protection feature 5 3 Sealing and Unsealing Data Memory Access The fuel gauge implements a key acce...

Page 68: ...768 32767 0 Num Calibration Temperature 0x91FA Internal Model Coefficient 3 I2 32768 32767 13356 Num Calibration Temperature 0x91FC Internal Model Coefficient 4 I2 32768 32767 6661 Num Calibration Temperature 0x91FE External Model Coefficient 1 I2 32768 32767 11130 Num Calibration Temperature 0x9200 External Model Coefficient 2 I2 32768 32767 19142 Num Calibration Temperature 0x9202 External Model...

Page 69: ...ontrol Charge Termination 0x924F Taper Current I2 0 1000 100 mA Charger Control Charge Termination 0x9251 Minimum Taper Capacity I2 0 1000 25 0 01 mAh Charger Control Charge Termination 0x9253 Current Taper Window U1 0 60 40 s Charger Control NiMH Charge Termination 0x9254 Delta Temperature I2 400 1200 30 0 1 C Charger Control NiMH Charge Termination 0x9256 Delta Temperature Time U2 0 255 100 s Ch...

Page 70: ...ds 0x928C Charge Relax Time U1 0 255 60 s Configuration Current Thresholds 0x928D Quit Relax Time U1 0 63 1 s Configuration SOC 0x92ED Flag Config A H2 0x0 0x0FFF 0x0C8C Hex Configuration SOC 0x92EF Flag Config B H1 0x0 0xFF 0x8C Hex Settings Configuration 0x9266 Alert_0 Config H1 0x00 0xFF 0x00 Hex Settings Configuration 0x9267 Alert_1 Config H1 0x00 0xFF 0x00 Hex Settings Configuration 0x9268 Al...

Page 71: ... I2 0 32767 3700 mV Gas Gauging CEDV Profile 1 0x934F Charge Termination Voltage I2 0 1000 100 mV Gas Gauging CEDV Profile 1 0x9351 EMF U2 0 65535 3743 Gas Gauging CEDV Profile 1 0x9353 C0 U2 0 65535 149 Gas Gauging CEDV Profile 1 0x9355 R0 U2 0 65535 867 Gas Gauging CEDV Profile 1 0x9357 T0 U2 0 65535 4030 Gas Gauging CEDV Profile 1 0x9359 R1 U2 0 65535 316 Gas Gauging CEDV Profile 1 0x935B TC U1...

Page 72: ...rning 0x930E Minimum Learn Time U2 0 65535 750 Hours End Of Service Resistance Learning 0x9310 Alert Warn Learn Time U2 0 65535 750 Hours End Of Service Resistance Learning 0x9312 Initial Learn Pulse Number U1 0 255 1 Counts End Of Service Resistance Learning 0x9313 Learn Charge Voltage Delta I2 0 32767 100 mV End Of Service Resistance Learning 0x9315 Learn Charge Time Limit U2 0 65535 3600 s End ...

Page 73: ...ure 0x4806 Internal Model Coefficient 2 I2 32768 32767 0 Num Calibration ROM Default Temperature 0x4808 Internal Model Coefficient 3 I2 32768 32767 13356 Num Calibration ROM Default Temperature 0x480A Internal Model Coefficient 4 I2 32768 32767 6661 Num Calibration ROM Default Temperature 0x480C External Model Coefficient 1 I2 32768 32767 11130 Num Calibration ROM Default Temperature 0x480E Extern...

Page 74: ...1 Taper Current I2 0 1000 100 mA Charger Control ROM Default Charge Termination 0x4853 Minimum Taper Capacity I2 0 1000 25 0 01 mAh Charger Control ROM Default Charge Termination 0x4855 Current Taper Window U1 0 60 40 s Charger Control ROM Default NiMH Charge Termination 0x4856 Delta Temperature I2 400 1200 30 0 1 C Charger Control ROM Default NiMH Charge Termination 0x4858 Delta Temperature Time ...

Page 75: ...e Type H2 0x0000 0xFFFF 0x0210 Hex Configuration ROM Default BLT 0x4870 Init Discharge Set I2 0 32767 150 mAh Configuration ROM Default BLT 0x4872 Init Charge Set I2 0 32767 175 mAh Configuration ROM Default Power 0x4879 Sleep Current I2 0 100 10 mA Configuration ROM Default Power 0x487B Bus Low Time U1 0 255 5 s Configuration ROM Default Power 0x487C Offset Cal Inhibit Temp Low I2 400 1200 50 0 1...

Page 76: ...5000 3000 mV Gas Gauging ROM Default FD 0x48F4 Clear Voltage Threshold I2 0 5000 3100 mV Gas Gauging ROM Default FD 0x48F6 Set RSOC Threshold U1 0 100 0 Gas Gauging ROM Default FD 0x48F7 Clear RSOC Threshold U1 0 100 5 Gas Gauging ROM Default FC 0x48F8 Set Voltage Threshold I2 0 5000 4200 mV Gas Gauging ROM Default FC 0x48FA Clear Voltage Threshold I2 0 5000 4100 mV Gas Gauging ROM Default FC 0x48...

Page 77: ...s Gauging ROM Default CEDV Profile 1 0x4955 C0 U2 0 65535 149 Gas Gauging ROM Default CEDV Profile 1 0x4957 R0 U2 0 65535 867 Gas Gauging ROM Default CEDV Profile 1 0x4959 T0 U2 0 65535 4030 Gas Gauging ROM Default CEDV Profile 1 0x495B R1 U2 0 65535 316 Gas Gauging ROM Default CEDV Profile 1 0x495D TC U1 0 255 9 Gas Gauging ROM Default CEDV Profile 1 0x495E C1 U1 0 255 0 Gas Gauging ROM Default C...

Page 78: ... 2 0x498B Gauging Configuration H2 0x0 0x1FFF 0x102A Hex Gas Gauging ROM Default CEDV Profile 2 0x498D Full Charge Capacity I2 0 32767 1450 mAh Gas Gauging ROM Default CEDV Profile 2 0x498F Design Capacity I2 0 32767 1450 mAh Gas Gauging ROM Default CEDV Profile 2 0x4993 Design Voltage I2 0 32767 3200 mV Gas Gauging ROM Default CEDV Profile 2 0x4995 Charge Termination Voltage I2 0 1000 100 mV Gas ...

Page 79: ... T2 I2 0 32767 3550 mV Gas Gauging ROM Default CEDV Profile 2 0x49CB JEITA Charge Voltage T2 T3 I2 0 32767 3650 mV Gas Gauging ROM Default CEDV Profile 2 0x49CD JEITA Charge Voltage T3 T4 I2 0 32767 3550 mV Gas Gauging ROM Default CEDV Smoothing Config 0x48E1 Smoothing Config H1 0x00 0xFF 0x08 Hex Gas Gauging ROM Default CEDV Smoothing Config 0x48E2 Smoothing Start Voltage I2 0 5000 3700 mV Gas Ga...

Page 80: ...ervice ROM Default Resistance Learning 0x4928 Rcell Low Temp Coefficient I2 32768 32767 0 2 16 0 1 C End Of Service ROM Default Direct Resistance Decision 0x492D DRD Alert Level U2 0 65535 45 End Of Service ROM Default Direct Resistance Decision 0x492F DRD Alert Counts U1 0 255 3 Counts End Of Service ROM Default Direct Resistance Decision 0x4930 DRD Warning Level U2 0 65535 60 End Of Service ROM ...

Page 81: ... Write 0x49 to 0x3E to access the MSB of Design Capacity wr 0x3E 0x49 9 Write 0x93 to 0x3F to access the LSB of Design Capacity wr 0x3F 0x93 10 Read both Design Capacity bytes starting at 0x40 rd 0x40 Old_DC_MSB 0x08 rd 0x41 Old_DC_LSB 0x98 11 Write both Design Capacity bytes starting at 0x40 For this example the new value is 1200 mAh 0x04B0 in hex wr 0x40 0x04 wr 0x41 0xB0 12 Calculate the new ch...

Page 82: ... GAUGEPARCAL the Gauge Parameter Calculator sometimes called GPC helps battery designers obtain matching Compensated End of Discharge Voltage CEDV coefficients for the specific battery profile The GPC tool enables a user to increase the accuracy of the fuel gauge IC over temperature For more information and detailed documents go to the GAUGEPARCAL product page ...

Page 83: ... Submit Documentation Feedback Copyright 2018 Texas Instruments Incorporated Revision History Revision History NOTE Page numbers for previous revisions may differ from page numbers in the current version Date Revision Notes September 2018 Initial Release ...

Page 84: ...se resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for...

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