Texas Instruments BQ25123, Manual

Page: 27 / 72

Table 9-7. Inductor Series (continued)
INDUCTANCE (µH) DCR (Ω)
DIMENSIONS
(mm
3
)
INDUCTOR TYPE SUPPLIER
(1)
COMMENT
2.2 0.12 2.5 x 2.0 x 1.2 MIPSA2520 2R2 TDK
2.2 0.145 3.3 x 3.3 x 1.4 LPS3314 Coicraft
(1) See Third-party Products Disclaimer
The PWM allows the use of small ceramic capacitors. Ceramic capacitors with low ESR values have the lowest
output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. At
light load currents, the converter operates in Power Save Mode and the output voltage ripple is dependent on
the output capacitor value and the PFM peak inductor current. Because the PWM converter has a pulsating input
current, a low ESR input capacitor is required on PMID for the best voltage filtering to ensure proper function of
the device and to minimize input voltage spikes. For most applications a 10-µF capacitor value is sufficient. The
PMID capacitor can be increased to 22 µF for better input voltage filtering.
Table 9-8 shows the recommended input/output capacitors.
Table 9-8. Capacitors
CAPACITANCE (µF) SIZE CAPACITOR TYPE SUPPLIER
(1)
COMMENT
10 0603 GRM188R60J106ME84 Murata Recommended
10 0402 CL05A106MP5NUNC Samsung EMA Smallest size
(1) See Third-party Products Disclaimer
9.3.22 Load Switch / LDO Output and Control
The device integrates a low Iq load switch which can also be used as a regulated output. The LSCTRL pin can
be used to turn the load on or off. Activating LSCTRL continuously holds the switch in the on state so long as
there is not a fault. The signal is active HI and has a low threshold making it capable of interfacing with low
voltage signals. To limit voltage drop or voltage transients, a small ceramic capacitor must be placed close to
VINLS. Due to the body diode of the PMOS switch, it is recommended to have the capacitor on VINLS ten times
larger than the output capacitor on LS/LDO.
The output voltage is programmable using the LS_LDO bits in the register. The LS/LDO voltage is calculated
using
Equation 9 .
LS/LDO = 0.8 V + LS_LDOCODE x 100 mV
(9)
If a value greater than 3.3 V is written, the setting goes to pass-through mode where LS/LDO = VINLS -
V
(DROPOUT)
. Table 9-9 summarizes the control of the LS/LDO output based on the I
2
C or LSCTRL pin setting:
Table 9-9. LS/LDO Output Control
I
2
C LS_LDO_EN PIN LSCTRL I
2
C V
LDO
> 3.3 LS/LDO OUTPUT
0 0 0 Pulldown
0 0 1 Pulldown
0 1 0 V
LDO
0 1 1 LSW
1 0 0 V
LDO
1 0 1 LSW
1 1 0 V
LDO
1 1 1 LSW
If the output of the LDO is less than the programmed V
(SYS)
voltage, connect VINLS to SYS. If the output of the
LDO is greater than the programmed V
SYS
voltage, connect VINLS to PMID.
www.ti.com
BQ25123
SLUSCZ6A – JANUARY 2018 – REVISED MAY 2021
Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 27
Product Folder Links: BQ25123