www.ti.com
Introduction
Jack
Description
JP4–1
Pull-up voltage source
LEDPWR
JP4–2
LED Pull-up power line
JP5–VEXT
External power supply
JP5–HI
Pull-up voltage source
JP5–VREF
IC reference voltage VREF
JP6–1
REGN pin (24)
4.2V REG
JP6–2
VADJ pin (12)
JP7–VREF
IC reference voltage VREF
JP7–VDAC
VDAC pin (11)
JP7–EXT
External VDAC voltage
JP8–1
BATDRV pin (14) output
BATDRV
JP8–2
LED drive
JP9–1
Pull-up voltage source
CHGDISA
JP9–2
CHGEN pin (1)
JP10–HI
Pull-up voltage source
JP10–CELLS
CELLS pin (20) output
JP10–LO
Ground
1.4
Control and Key Parameters Setting
Factory Setting
–001, –004,
–002, –003,
Jack
Description
or –005
–006, or –007
(bq24750/50A/52)
(bq24751/51A/51B/53)
Pin 8 connection
JP1
1-2 (751) : OVPSET
Jumper on 2-3
Jumper on 1-2
2-3 (750) : TS
JP2
Disable LEARN mode when on
Jumper Off
Jumper On
JP3
JP3 The conduction of the AC MOSFET is indicated by LED when on
Jumper On
Jumper On
The pull-up power source supplies the LEDs when on. LED has no
JP4
Jumper On
Jumper On
power source when off.
Pull-up power source setting
Jumper on 1-2
Jumper on 1-2
JP5
1-2: Use VREF as the pull-up source
(HI and VREF)
(HI and VREF)
2-3: Use external power supply as the pull-up source
JP6
Connect REGN to VADJ when on
Jumper On
Jumper On
VDAC voltage source setting
Jumper on 1-2
Jumper on 1-2
JP7
1-2 : Connect VREF to VDAC
(VREF and VDAC)
(VREF and VDAC)
2-3 : Connect external voltage source to VDAC
JP8
The conduction of the battery MOSFET is indicated by LED when on
Jumper On
Jumper On
JP9
Disable charge process when on
Jumper On
Jumper On
Number of cells selection
1-2 (HI-CELLS) : 4 cells
JP10
Jumper on 2-3 (3 cells)
Jumper on 2-3 (3 cells)
2-3 (CELLS-LO) : 3 cells
Open: 2 cells
3
SLUU283D – May 2007 – Revised March 2010
bq24750/50A/51/51A/51B/52/53 EVM (HPA207) For Multi —Cell Synchronous
Notebook Charger and System Power Selector
Copyright © 2007–2010, Texas Instruments Incorporated