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Introduction
1
Introduction
1.1
EVM Features
Refer to the data sheet (
) for detailed features and operation.
1.2
Design Considerations
This EVM has protection circuitry, external to the IC, to protect against applying a power source to the
input (VBUS) when the IC is in boost mode, converting battery power to a 5-VDC PMID output. This is
accomplished by two circuits on the EVM schematic by (1) adding an isolation circuit consisting of Q1, its
drive Q3, to apply input power when available and disconnect it when not available and (2) by pulling OTG
low, with Q2, when the input is available. Pulling OTG low disables the boost-mode operation.
The OTG pin should be pulled low at least a few microseconds before the input power is applied via Q1.
This is accomplished on this EVM by setting the drive resistance for Q2 (OTG ckt.) lower and drive
resistance for Q3 (VBUS connection) higher. The voltage threshold and resistance of the driver along with
the input capacitance of Q2 and Q3 set the desired timing sequencing. Q3 (VBUS turn on) has a
Thevinen-equivalent drive of 72k and for Q2 (OTG ckt.) is 35k, allowing the OTG signal to be pulled low
(disables Boost Mode) prior to the input voltage being applied.
1.3
General Descriptions
The bq24195/L evaluation module is a complete charger module for evaluating an I
2
C Controlled single
NVDC-1 charge using the bq2419x devices.
The bq24195/L EVM doesn’t include the USB-to-GPIO interface board. To evaluate the bq24195/L EVM
must order USB-to-GPIO interface board separately.
For details, see bq24195/L data sheet.
1.4
I/O Description
contains the jumper connections for this EVM.
Table 1. EVM Connections
Jack
Description
J1–V
IN
Input: positive terminal
J1–GND
Input: negative terminal (ground terminal)
J2-SYS
Connected to system
J2-BAT+
Connected to battery pack
J2-GND
Ground
J3
USB-to-GPIO connector (USB Interface Adapter
Connector - HPA172)
J4–INT
INT pin connection
J4– OTG
OTG pin connection
J4-CE
CE pin connection
J4-GND
Ground
J5-PMID
PMID pin connection or power bank output
J5-GND
Ground
J6-TS2
External TS2 pin connection
J6-GND
Ground
J7
Mini_USB Connector
J5-TS2
External TS2 pin connection
2
bq24195/L EVM (PWR193) User’s Guide
SLUUA18 – October 2012
Copyright © 2012, Texas Instruments Incorporated