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Introduction

1.6

Control and Key Parameters Setting

Jum

Default Factory

IC

Description

per

Setting

1-2: FET GATE = BGATE: External PFET's gate tied to BGATE pin and therefore controlled
by IC.

1-2 (FET GATE =

All

JP1

2-3: FET GATE = SYS: External PFET's gate tied to SYS and therefore disabled.

BGATE)

It is recommended that this jumper be changed only when the device is not enabled or in Hi-Z
mode so that the PFET's gate is never left open.

1-2: CE1 = HI: Active-low enable for reduced VBAT voltage (if CE2 = LO) or suspended

bq241

charging (if CE2 = HI)

JP2

2-3 (CE1 = LO)

65

2-3: CE1 = LO: Active-low enable for full current charging (if CE2 = LO) or charging at half
current (if CE2 = HI)

bq241
66

1-2: CE = HI: Active-low charge enable high to disable charge and enter Hi-Z mode

JP2

2-3 (CE = LO)

bq241

2-3: CE = LO: Active-low charge enable low for normal operation

67

1-2: IUSB3 = HI
2-3: IUSB3 = LO

All

JP3

2-3 (IUSB3 = LO)

See data sheet Table 1 for description of USB input current limit and VINDPM threshold
setting. Default setting is for 500-mA input current limit and 4.68-V threshold.

1-2: IUSB2 = HI
2-3: IUSB2 = LO

All

JP4

2-3 (IUSB2 = LO)

See data sheet Table 1 for description of USB input current limit and VINDPM threshold
setting. Default setting is for 500-mA input current limit and 4.68-V threshold.

1-2: IUSB1 = HI
2-3: IUSB1 = LO

All

JP5

1-2 (IUSB1 = HI)

See data sheet Table 1 for description of USB input current limit and VINDPM threshold
setting. Default setting is for 500-mA input current limit and 4.68-V threshold.

1-2 (CE2 = HI): Active-low enable for charging at half current (if CE1 = LO) or suspended

bq241

charging (if CE1 = HI)

JP6

2-3 (CE2 = LO)

65

2-3 (CE2 = LO): Active-low enable for full current charging (if CE1 = LO) or reduced VBAT
voltage (if CE1 = HI)

1-2 (TS = EXT): Connects the TS pin to an external thermistor. The resistor divider formed by

bq241

R4 and R5 has been sized to accommodate a 10-k

Ω

thermistor. If a different thermistor is

66

used, R4 and R5 need to be resized.

JP6

2-3 (TS = INT)

bq241

2-3 (TS = INT): Connects a potentiometer to the TS pin so the potentiometer can emulate a

67

thermistor. The potentiometer has been preset to approximately 3.4 k

Ω

so that the TS voltage

is 0.5 x V(DRV).

1.7

Recommended Operating Conditions

Min

Typ

Max

Unit

Supply voltage, V

IN

Operating input voltage from ac adapter

4.2

10

V

USB voltage, V

USB

Operating input voltage from USB or equivalent supply

4.2

6

V

Battery voltage, V

BAT

Voltage applied at VBAT terminal (depends on status of CE1

4.02

4.2

4.24

V

and CE2)

System voltage, V

SYS

Voltage output at SYS terminal (depends on VBAT voltage

3.4

4.37

V

and status of V

INDPM

)

Supply current, I

IN(MAX)

Maximum input current limit for ac adapter input (set by

1.5

2.5

A

user-selectable resistor)

Supply current, I

USB(MAX)

Maximum input current limit for USB input (set by USBx

0.1

0.5

1.5

A

input pins)

Max fast charge current,

Battery charge current

0.550

2.5

A

I

CHRG(MAX)

Operating junction temperature range, T

J

-40

125

°C

5

SLUU497B – December 2011 – Revised June 2012

Chipscale-Packaged bq24165, 24166, 24167 Evaluation Modules

Submit Documentation Feedback

Copyright © 2011–2012, Texas Instruments Incorporated

Summary of Contents for bq24165

Page 1: ...mended Operating Conditions 5 2 Test Summary 6 2 1 Definitions 6 2 2 Recommended Test Equipment 6 2 3 Recommended Test Equipment Setup 7 2 4 Recommended Test Procedure 8 3 Printed Circuit Board Layout Guideline 10 4 Bill of Materials and Board Layout 11 4 1 Bill of Materials 11 4 2 Board Layout 13 List of Figures 1 bq24165 166 167EVM HPA741 Schematic 3 2 BAT Load PR1010 Schematic 7 3 Original Test...

Page 2: ... is a complete charger module for evaluating compact flexible high efficiency USB friendly switch mode battery charge and power path management solution for single cell Li ion and Li polymer battery powered systems used in a wide range of portable applications Key EVM features include Programmable charge current input current on and VINDPM threshold using jumpers Input power connectors for both US...

Page 3: ...may have been assembled with incorrectly marked ICs Regardless of the IC s marking the EVM was assembled with the correct part number as specified in the EVM bill of material 3 SLUU497B December 2011 Revised June 2012 Chipscale Packaged bq24165 24166 24167 Evaluation Modules Submit Documentation Feedback Copyright 2011 2012 Texas Instruments Incorporated ...

Page 4: ...l J12 GND Battery negative header J13 DRV DRV reference voltage positive header J14 DRV DRV reference voltage positive terminal J14 GND DRV reference voltage negative terminal J15 GND DRV reference voltage negative header J16 IN External thermistor positive terminal J16 GND Ground connection for external thermistor 1 5 Test Points Test Point Description TP1 Kelvin to IN TP2 Kelvin to USB TP3 SW TP...

Page 5: ...mA input current limit and 4 68 V threshold 1 2 CE2 HI Active low enable for charging at half current if CE1 LO or suspended bq241 charging if CE1 HI JP6 2 3 CE2 LO 65 2 3 CE2 LO Active low enable for full current charging if CE1 LO or reduced VBAT voltage if CE1 HI 1 2 TS EXT Connects the TS pin to an external thermistor The resistor divider formed by bq241 R4 and R5 has been sized to accommodate...

Page 6: ...rted Measure A B Check specified parameters A B If measured values are not within specified limits the unit under test has failed Observe A B Observe if A B occur If they do not occur the unit under test has failed Assembly drawings have location for jumpers test points and individual components 2 2 Recommended Test Equipment 2 2 1 Power Supplies 1 Power Supply number 1 PS1 capable of supplying 6 ...

Page 7: ...hown in Figure 2 is used connect Power Supply number 2 PS2 set to approximately 3 6 V to the input side PS2 of BAT_Load PR1010 then turn off PS2 4 Connect the output side of the battery or BAT_Load PR1010 in series with current meter multimeter number 2 CM2 to J2 and J6 or J3 BAT GND Ensure that a voltage meter is connected across J2 or TP3 and J6 or TP9 BAT GND 5 Connect VM3 across J5 or TP4 and ...

Page 8: ...meter number 1 CM1 to J2 IN GND 4 Connect voltage meter number 1 VM1 across J1 or TP1 and J3 or TP6 IN GND 5 With PS2 disabled turn on PS1 6 Measure Measure on VM3 V J5 TP4 SYS J9 GND 4 3 100 mV Measure on VM4 V J13 DRV J15 GND 5 2 200 mV 7 Move JP2 CE1 or CE LO and JP6 LO Adjust the power supply so that VM1 still reads 6 V 100 mV if necessary 8 Enable PS2 and adjust PS2 so that the voltage measur...

Page 9: ...st PS2 so that the voltage measured by VM2 across BAT and GND measures 3 2 V 50 mV 9 Measure Measure on CM2 ICHRG 735 mA 75 mA Measure on CM1 IIN 475 mA 50 mA Observe D1 and D2 are on 10 Turn off PS1 and PS2 2 4 3 Helpful hints 1 To observe the taper current as the battery voltage approaches the set regulation voltage allow the battery to charge or if using BAT_Load PR1010 slowly increase the PS2 ...

Page 10: ...urn of all components through vias two vias per capacitor for power stage capacitors one via per capacitor for small signal components It is also recommended to put vias inside the PGND pads for the IC if possible A star ground design approach is typically used to keep circuit block currents isolated high power low power small signal which reduces noise coupling and ground bounce issues A single g...

Page 11: ...l Block 2 pin 6 A 3 5mm 0 27 x 0 25 ED555 2DS OST 6 6 6 JP1 JP2 JP3 JP4 JP5 PEC03SAAN Header Male 3 pin 100mil spacing 0 100 inch x 3 PEC03SAAN Sullins JP6 1 1 1 L1 1 5µH Inductor SMT 3 5A 70 mΩ 4 1 x 4 4 mm SPM4012T 1R5M TDK Alternate Toko Alternate FDSD0415 H 1R5M 1 1 1 Q1 CSD25401Q3 MOSFET PChan 20V 60A 8 7 mΩ chipscale3 3X3 3mm CSD25401Q3 TI 1 1 1 R1 26 7kΩ Resistor Chip 1 16W 1 603 Std Std 1 ...

Page 12: ...RGER with 0 1 0 U1 BQ24166YFF IC 2 5A Dual Input Single Cell Switch mode Li Ion BGA BQ24166YFF TI BATTERY CHARGER with 0 0 1 U1 BQ24167YFF IC 2 5A Dual Input Single Cell Switch mode Li Ion BGA BQ24167YFF TI BATTERY CHARGER with 6 6 6 Shunt 100 mil Black 0 100 929950 00 3M 12 Chipscale Packaged bq24165 24166 24167 Evaluation Modules SLUU497B December 2011 Revised June 2012 Submit Documentation Feed...

Page 13: ...ard Layout 4 2 Board Layout Figure 4 Top Assembly Layer Figure 5 Top Layer 13 SLUU497B December 2011 Revised June 2012 Chipscale Packaged bq24165 24166 24167 Evaluation Modules Submit Documentation Feedback Copyright 2011 2012 Texas Instruments Incorporated ...

Page 14: ...ti com Figure 6 Bottom Layer Figure 7 First Internal Layer 14 Chipscale Packaged bq24165 24166 24167 Evaluation Modules SLUU497B December 2011 Revised June 2012 Submit Documentation Feedback Copyright 2011 2012 Texas Instruments Incorporated ...

Page 15: ...and Board Layout Figure 8 Second Internal Layer 15 SLUU497B December 2011 Revised June 2012 Chipscale Packaged bq24165 24166 24167 Evaluation Modules Submit Documentation Feedback Copyright 2011 2012 Texas Instruments Incorporated ...

Page 16: ...ency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES 003 rules which are designed to provide reasonable protection against radio frequency interference Operation of the equipment may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required t...

Page 17: ... its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful communication This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this l...

Page 18: ...er you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product Also please do not transfer this product unless you give the same notice above to the transferee Please note that if you could not follow the instructions above you will be subject to penalties of Radio Law of Japan Texas Instruments Japan Limited address 24 1 Nishi Shi...

Page 19: ... property damage personal injury or death If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and intended loads Any loads applied outside of the specified output range may result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Plea...

Page 20: ...for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agre...

Page 21: ...андарту ISO 9001 Лицензия ФСБ на осуществление работ с использованием сведений составляющих государственную тайну Поставка специализированных компонентов Xilinx Altera Analog Devices Intersil Interpoint Microsemi Aeroflex Peregrine Syfer Eurofarad Texas Instrument Miteq Cobham E2V MA COM Hittite Mini Circuits General Dynamics и др Помимо этого одним из направлений компании ЭлектроПласт является на...

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