Test Setup and Results
8
SLUUC51A – June 2020 – Revised July 2020
Copyright © 2020, Texas Instruments Incorporated
BQ25790EVM (BMS027) Evaluation Module User's Guide
•
Click READ ALL REGISTERS and Verify
➡
REG1Cb[7:5] reports fast charge
5. Increase Load #1 regulation voltage to 8.4 V and take measurements as follows:
•
Measure
➡
➡
V
BAT-PGND
(TP27 and TP46) = 8.4 V ±0.04 V
•
Measure
➡
➡
I
BAT_SENSE
(voltage across 0.01-
Ω
resistor between TP17 and TP18) = 0 mA ±10 mA
•
Click READ ALL REGISTERS and Verify
➡
REG1Cb[7:5] reports termination
6. Helpful hints when changing voltages and register settings during charge mode:
•
If increasing charge current or adding a load at SYS J3 terminal, you will likely need to disable the
EN_ILIM bit using 8-bit register tab/Charger Single-bit Registers/REG14b[1] and increase the
IINDPM register setting in 16-bit register tab/Charger Multi-bit Registers/REG06b[8:0].
•
If increasing the input voltage above 8 V for the charger to enter buck mode, you will need to
increase the VAC_OVP from 7 V default using 8-bit register tab/Charger Multi-bit
Registers/REG10b[5:4].
•
The battery configuration is set at startup using the PROG pin (Jumpers JP24 to JP31). The
battery configuration can also be changed using 16-bit register tab/Charger Multi-bit
Registers/REG0Ab[7:6]. Note that the SYSMIN and charge current charge with cell configuration.
•
The status, fault and interrupt bits report are helpful debug tools.
2.4.4
OTG Mode Verification
Use the following steps for OTG mode verification for boost operation:
1. Power up then turn off Load#2 output. Set to CR = 12 V/0.5 A = 24
Ω
. Disconnect PS1 from J1 and
attach Load#2 to J1 (VIN1 and GND).
2. Increase Load #1 regulation voltage to 8.0 V and take measurements as follows:
•
Measure
➡
➡
V
BAT-PGND
(TP27 and TP46) = 8.0 V ±0.1 V
3. Prepare the OTG mode charger register settings in the following way:
•
On the
8-bit Registers tab
in the
Chip Config Multi-bit Registers
section
–
REG0Fb[5] = 0 to disable charge mode
–
REG12b[6] = 1 to enable OTG mode
–
REG13b[6] = 0 to enable ACDR1 FETs
•
On the
8-bit Registers tab
in the
OTG Multi-bit Registers
section
–
REG0Bb[10:0] = 01110011000 to set the OTG mode regulation voltage to 12000 mV.
•
On the
8-bit Registers tab
in the
OTG Multi-bit Registers
section
–
REG0Db[6:0] = 0011001 to set the OTG mode current limit to 1000 mA.
4. Take measurements as follows:
•
Measure
➡
➡
V
VBUS-PGND
(TP21 and TP45) = 12.0 V ±0.2 V
•
Measure
➡
➡
V
AC1-PGND
(TP22 and TP45) = 12.0 V ±0.2 V
•
Click READ ALL REGISTERS
–
Verify
➡
REG1Bb[6] reports VINDPM or OTG
–
Verify
➡
REG1Cb[4:1] reports VBUS Status as Normal OTG
5. Turn on Load#2 output set to CR of 24
Ω
.
6. Take measurements as follows:
•
Measure
➡
➡
V
AC1-PGND
(TP22 and TP45) = 12.0 V ±0.2 V
•
Measure
➡
➡
I
AC1-SENSE
(TP1 and TP2) = 500 mA ±0.10 A
7. Lower the Load#2 CR to 10
Ω
.
8. Take measurements as follows to confirm OTG current function:
•
Measure
➡
➡
V
AC1-PGND
(TP22 and TP45) < 12.0 V ±0.2 V
•
Measure
➡
➡
I
AC1-SENSE
(TP1 and TP2) = 1000 mA ±0.10 A
•
Click READ ALL REGISTERS and Verify
➡
REG1Bb[7] reports IINDPM