Texas Instruments AN-1966 LMH2190 User Manual Download Page 2

Basic Operation

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2

Basic Operation

The LMH2190 evaluation board is designed such that it gives maximum flexibility in evaluating the
LMH2190 in various configurations. The schematic, Bill of material and board layout can be found at the
end of this document. In the following sections a description will be given on how to setup the
measurement bench. For the factory default jumper setting, refer to

Section 3

.

2.1

Supply

The common ground of the evaluation board is connected via Connector CON3. The LMH2190 is
powered via V

BAT

(CON2). The typical supply voltage for V

BAT

is 3.5V, but it may range from 2.5V to 5.5V.

In the factory default configuration the ENABLE voltage is supplied externally via connector CON7 and
should be 1.8V. Three on-board buffers are separately powered through Connector CON18 (+5V) and
CON 19 (-5V). If they are not used for evaluation they can be left un-powered when jumper locations J7,
J16 and J17 are open.

2.2

Applying Clock

In factory default configuration the clock to the LMH2190 is supplied by the on-board TCXO. Alternatively
the clock can be applied externally either in DC mode via CON12 or in AC mode via CON10. The clock
source can be selected by J13. Note that for DC mode, the I

2

C registers also need to be changed.

The LMH2190 distributes the clock to a maximum of 4 outputs, CLK1 to CLK4, that are accessible via
CON1, CON5, CON6 and CON8. An additional capacitive load can be connected between CLK to GND to
simulate the load in the actual application via J1, J2, J14 and J15.

There is also a possibility to measure the clocks as well as the TCXO clock via a buffer. This buffer can
drive 50 ohm making them excellent for connecting to measurement equipment, like a Signal Source
Analyzer. This analyzer can for instance measure the Phase noise and Jitter. The three buffers can be
connected to the clock's by J7, J16 and J17. When the buffers are not used it is recommended to
disconnect them, since they increase the capacitive load on the clocks slightly.

2.3

Clock Request

The CLK's can be enabled by their appropriate CLK_REQ's. The CLK_REQ pin can be connected to a
logic Low or High level via J6, J8, J10 and J12. The level of the Logic High can be selected by J5, either
V

OUT

, V

BAT

or V

ENABLE

. Instead of via the jumpers, the CLK_REQ's can also be controlled via CON9,

CON11, CON13 and CON14. Make sure that the jumpers are removed in this case. In factory default
configuration only CLK1 is enabled. The other clocks can simply be enabled by placing the jumper on J8,
J10 and J12 in the other position.

2.4

I

2

C Interface

The LMH2190 can be controlled by an I

2

C host device that can be connected via J4. It can configure the

registers inside the LMH2190 to change the default configuration. According to the I

2

C specification one

set of pull-up resistors needs to be present on the I

2

C bus. If they are not present elsewhere in the system

they can be connected on the evaluation board via J19. The evaluation board can be used without I

2

C

host device connected. It will then work in its default configuration.

3

Configuration

The LMH2190 evaluation board can be configured via jumper settings. An overview of the various jumper
positions on the board is given in

Figure 2

. The settings of these jumpers and their functions are listed in

Table 1

.

2

AN-1966 LMH2190 Evaluation Board

SNAA068B – July 2009 – Revised May 2013

Submit Documentation Feedback

Copyright © 2009–2013, Texas Instruments Incorporated

Summary of Contents for AN-1966 LMH2190

Page 1: ...e capability for fanout or longer traces protection of the master clock from varying loads and frequency pulling effects isolation buffering from noisy modules and crosstalk isolation It has very low phase noise which enables it to drive sensitive modules such as Wireless LAN and Bluetooth Figure 1 LMH2190 Evaluation Board I2 C is a trademark of Philips Semiconductor Corp All other trademarks are ...

Page 2: ...er can drive 50 ohm making them excellent for connecting to measurement equipment like a Signal Source Analyzer This analyzer can for instance measure the Phase noise and Jitter The three buffers can be connected to the clock s by J7 J16 and J17 When the buffers are not used it is recommended to disconnect them since they increase the capacitive load on the clocks slightly 2 3 Clock Request The CL...

Page 3: ...F from CLK2 to GND 5 6 Connects 33 pF from CLK2 to GND 7 8 Connects 47 pF from CLK2 to GND J3 ENABLE 1 2 ENABLE VOUT 3 4 ENABLE is supplied by CON7 5 6 ENABLE is supplied by I2 C conector J4 pin 4 7 8 ENABLE GND J4 I2 C Header Header to connect I2 C signals J5 CLK_REQx Logic High 1 2 CLK_REQxHIGH VOUT Level 3 4 CLK_REQxHIGH VBAT 5 6 CLK_REQxHIGH VENABLE 1 Bold face jumper settings refer to the fac...

Page 4: ...n board TCXO J14 CLK3 Capacitive load 1 2 Connects 10 pF from CLK3 to GND 3 4 Connects 22 pF from CLK3 to GND 5 6 Connects 33 pF from CLK3 to GND 7 8 Connects 47 pF from CLK3 to GND J15 CLK4 Capacitive load 1 2 Connects 10 pF from CLK4 to GND 3 4 Connects 22 pF from CLK4 to GND 5 6 Connects 33 pF from CLK4 to GND 7 8 Connects 47 pF from CLK4 to GND J16 Connects Buffer to Open No buffer connected t...

Page 5: ...plied unless buffers U2 U3 and or U4 are used for the measurements In factory default configuration only CLK1 is enabled With an oscilloscope and Hi impedance probes the TCXO J13 4 and CLK1 TP1 can be measured This should result in a measurement as depicted in Figure 4 Other CLK s can be enabled by connecting the appropriate CLK_REQ to VBAT J8 J10 J12 A schematic representation of the TCXO and all...

Page 6: ...pF C3 C8 C20 C23 0603 Capacitor 33 pF C6 Case A Capacitor NC C7 C28 C31 Case A Capacitor 10 µF C9 C10 C25 C29 C30 0603 Capacitor 100 nF C12 C16 0603 Capacitor 10 nF C14 C15 0603 Capacitor 470 pF C17 C18 C21 C24 0603 Capacitor 47 pF C26 R9 R10 R13 R15 0603 Capacitor Resistor NC C27 Case A Capacitor 2 2 µF CON1 Connector SMA 6 AN 1966 LMH2190 Evaluation Board SNAA068B July 2009 Revised May 2013 Subm...

Page 7: ...R21 R22 0603 Resistor 51Ω U1 DSBGA LMH2190 U2 U3 U4 SOIC LMH6559 X1 small TCXO 26 0MHz 7 Board Layout As with any other device careful attention must be paid to the board layout If the board is not properly designed the performance of the device can be less than might be expected Especially the input clock trace SCLK_IN and output traces CLK1 2 3 4 should be as short as possible to reduce the capa...

Page 8: ...Layout www ti com Figure 7 Component Locations Top Side 8 AN 1966 LMH2190 Evaluation Board SNAA068B July 2009 Revised May 2013 Submit Documentation Feedback Copyright 2009 2013 Texas Instruments Incorporated ...

Page 9: ...ard Layout Figure 8 Component Locations Bottom Side Bottom View 9 SNAA068B July 2009 Revised May 2013 AN 1966 LMH2190 Evaluation Board Submit Documentation Feedback Copyright 2009 2013 Texas Instruments Incorporated ...

Page 10: ...luation Board Figure 10 Inner Layer of Evaluation Board Figure 11 Bottom Layer of Evaluation Board 10 AN 1966 LMH2190 Evaluation Board SNAA068B July 2009 Revised May 2013 Submit Documentation Feedback Copyright 2009 2013 Texas Instruments Incorporated ...

Page 11: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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