Texas Instruments AMC7834, User Manual, Page: 10 / 32

AMC7834EVM Hardware Overview
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10 SLAU608B – December 2014 – Revised May 2016
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AMC7834 Evaluation Module
Table 5. AMC7834EVM Power Shunt Jumper Settings
Jumper Default Position Function
JP11 Shunt on 1-2 Selecting Internal/External AVDD/DVDD
• 1-2: Connects AVDD/DVDD pins to o5-V
• 2-3: Connects AVDD/DVDD pins to external connector (J8)
JP12 Shunt on 1-2 Selecting Internal/External VCC
• 1-2: Connects VCC pins to o5-V
• 2-3: Connects VCC pins to external connector (J9)
JP13 Shunt on 1-2 Selecting Internal/External AVSS
• 1-2: Connects AVSS pins to onboard -5-V
• 2-3: Connects AVSS pins to external connector (J10)
JP14 Shunt on 1-2 Selecting Internal/External IOVDD
• 1-2: Connects IOVDD pins to o3.3-V
• 2-3: Connects IOVDD pins to external connector (J11)
4.5 ADC/SENSE Signal Pins
The AMC7834 device contains a multi-channel 12-bit SAR ADC with four external ADC inputs, which
range from 0 to +2.5 V. The device also features four high-side current sense amplifiers that have
common-mode voltages of 4- to +60-V, and can be programmed for closed-loop (drain current) operation.
These signal pins connect to the J3 header, which is described in
Table 6 .
Table 6. AMC7834EVM ADC/SENSE Signal
Connections
Name Connector Description
ADC1 J3-15 ADC channel 1 input
ADC2 J3-13 ADC channel 2 input
ADC3 J3-11 ADC channel 3 input
ADC4 J3-9 ADC channel 4 input
SNS1+/– J3-7,8 SENSE 1 input
SNS2+/– J3-5,6 SENSE 2 input
SNS3+/– J3-3,4 SENSE 3 input
SNS4+/– J3-1,2 SENSE 4 input
4.6 Reference Configuration Options
As described in AMC7834EVM Power Configurations , the reference has multiple configuration schemes
that can connect to an internal or ex2.5 V, and can be configured to connect to the ADC or DAC
block. The different connection schemes are displayed in
Table 7 .
Table 7. Reference Configuration Settings
Setting Number Reference Config Jumper Position Description
Setting 1 External ADC/ External DAC
Reference (two supplies) JP6 not installed (Verify that both ADC and DAC Reference
buffers are disabled.) Apply external
reference voltages to ADC/CMP and
REF_IN pins, J3–18 and J3–17 respectively.
JP10 is not installed
Setting 2 Internal ADC/DAC Reference JP6 not installed (Enable ADC and DAC Reference buffers
through software.) Use REF_OUT to supply
REF_IN pin (J3–17).
JP10 set to 2-3
Setting 3 External ADC/ External DAC
Reference (one supply) JP6 not installed (Enable ADC and DAC Reference buffers
through software.) Use external reference to
supply REF_IN pin (J3–17).
JP10 is not installed