GND
GND
GND
GND
470 pF
C59
470 pF
C58
470 pF
C57
470 pF
C56
0.1 μF
C61
0.1 F
μ
C60
0.1 F
μ
C49
0.1 F
μ
C34
0.1 F
μ
C67
0.1 μF
C66
0.1 F
μ
C50
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
TP10
TP8
TP6
TP19
TP13
4.7 F
μ
C62
GND
GND
GND
470 pF
C55
470 pF
C54
470 pF
C45
470 pF
C44
470 pF
C43
470 pF
C42
470 pF
C41
470 pF
C40
470 pF
C39
470 pF
C38
470 pF
C37
470 pF
C36
470 pF
C35
TP20
TP21
SDO
SCLK
SDI
CS
/RESET
GND
0.1 F
μ
C29
10 F
μ
C27
0.1 F
μ
C53
10 F
μ
C51
0.1 F
μ
C65
10 F
μ
C63
TP7
0.1 F
μ
C48
10 F
μ
C46
TP18
GND
C77
DNI
10 F
μ
C74
GND
/RESET
CS
SCLK
SDO
SDI
GND
GND
10.0 kΩ
R78
10.0 kΩ
R82
10.0 kΩ
R79
10.0 kΩ
R80
10.0 kΩ
R81
0.1 F
μ
C76
GND
AV
DD
AV
DD
DV
DD
DV
DD
IOV
DD
IOV
DD
IOV
DD
AV
CC
AV
CC
AV
EE
AV
EE
+12_LDO
+5_LDO
–
12_LDO
GND
TP1
GND
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
AV
CC
AV
EE
AV
DD
GND
IOV
DD
GND
AV
CC
GND
AV
EE
+5_LDO
GND
TP4
TP5
TP2
TP3
DACD5
DACD4
DACD3
DACD2
DACB7
DACB6
DACC0
DACC1
DACA11
DACA10
DACA9
DACA8
GND
0
R37
0
R38
0
R39
0
R76
0
R77
0
R83
0
R84
0
R85
0
R86
0
R87
0
R88
0
R89
0
R90
0
R91
0
R92
0
R41
0
R42
0
R43
0
R45
0
R46
0
R47
0
R50
0
R52
0
R54
0
R57
0
R59
0
R61
0
R63
0
R65
0
R67
0
R69
0
R71
A
V
s
s
_
A
GND
GND
4
1
2
3
J7
C73
DNI
4
1
2
3
J9
GND
D
A
C
D
5
DACD4
DACD3
DACD2
D
A
C
B
7
DACB6
D
A
C
C
0
DACC1
D
A
C
A
1
1
DACA10
D
A
C
A
9
DACA8
A
V
s
s
_
B
AVss_C
AVss_D
A
V
s
s
_
D
A
Vss_C
AVss_A
AVss_B
0
R36
0.1 F
μ
C30
0.1 F
μ
C31
0.1 F
μ
C32
0.1 F
μ
C33
GND
THERM1
THERM1
GND
GND
GND
GND
DV
DD
Vdut
I2C_CLK
I2C_SDA
CS
SCLK
SDO
SDI
Vdut
I2C_CLK
I2C_SDA
Vdut
GND
GND
Vdut
REF_CMP
5
4
1
2
3
6
7
8
J8
GND
DNI -Temperature Circuit -User Option
0
R40
TP22
TP23
TP9
TP11
TP12
TP14
TP15
TP16
5
4
1
2
3
6
7
8
J10
5
4
1
2
3
6
7
8
J5
TP17
R44
DNI
0
W
R48
R55
R73
R74
DNI
R75
ADC_3
48
GPIO5
14
LV_ADC12
45
AVEE
17
LV_ADC15
42
A
V
S
S
_
A
2
0
ADC_7
39
A
G
N
D
1
2
3
V
R
A
N
G
E
_
B
2
6
D
A
C
B
_
6
2
9
REF_CMP
32
ADC_11
35
GPIO6
15
GPIO7
16
ADC_5
46
ADC_4
47
LV_ADC14
43
LV_ADC13
44
V
R
A
N
G
E
_
A
2
1
D
A
C
A
_
9
2
2
ADC_6
40
LV_ADC16
41
ADC_9
37
ADC_8
38
A
V
C
C
_
A
B
2
5
A
V
S
S
_
B
2
8
AVDD1
31
R
E
F
_
O
U
T
1
3
0
AVDD2
34
ADC_10
36
D
A
C
B
_
7
2
7
AGND2
33
GPIO2/ADCTRIG
11
CS
8
SDO
5
DVDD
2
GPIO4
13
D
A
C
A
_
1
1
1
8
D
A
C
A
_
1
0
1
9
D
A
C
A
_
8
2
4
GPIO3/DAV
12
GPIO0/ALARMIN
9
SDI
6
SCLK
7
IOVDD
3
DGND
1
GPIO1/ALARMOUT
10
RESET
4
ADC_2
49
ADC_1
50
ADC_0
51
D
A
C
C
_
1
5
2
A
V
S
S
_
C
5
3
D
A
C
C
_
0
5
4
V
R
A
N
G
E
_
C
5
5
R
E
F
_
O
U
T
2
5
6
A
V
C
C
_
C
D
5
7
D
A
C
D
_
5
6
4
A
G
N
D
3
5
9
D
A
C
D
_
4
6
3
V
R
A
N
G
E
_
D
6
1
A
V
S
S
_
D
6
2
D
A
C
D
_
3
6
0
D
A
C
D
_
2
5
8
DAP
65
U6
AMC7832IPAP
1
2
3
J3
1
2
3
4
JP3
1
2
3
JP1
1
2
J11
1
2
3
JP2
1
2
3
JP5
1
2
3
JP4
1
2
J2
C68
DNI
C69
DNI
C70
DNI
C71
DNI
C72
DNI
C78
DNI
C79
DNI
C80
DNI
C81
DNI
C82
DNI
C83
DNI
NC
1
2
V+
4
5
VO
3
GND
U7
DNI
1
3
5
6
4
2
7
9
10
8
12
11
14
13
16
15
18
17
20
19
J6
1
2
3
JP6
5
4
1
2
3
6
7
8
9
10
11
12
13
14
15
16
17
J4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
J12
1 F
μ
C28
1 F
μ
C47
1 F
μ
C52
1 F
μ
C64
1 F
μ
C75
0
R49
0
R51
0
R53
0
R56
0
R58
0
R60
0
R62
0
R64
0
R66
0
R68
0
R70
0
R72
DNI
0
W
0
W
0
W
DNI
AMC7832EVM Documentation
23
SLAU544A – February 2014 – Revised September 2016
Copyright © 2014–2016, Texas Instruments Incorporated
AMC7832EVM User’s Guide
Figure 24. Board Schematic