Texas Instruments AM64 Series, User Manual

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User’s Guide
AM64x GP EVM User's Guide
Table of Contents
1 Introduction ............................................................................................................................................................................. 3
2 Important Usage Notes ........................................................................................................................................................... 4
2.1 Power-On Usage Note....................................................................................................................................................... 4
3 System Description ................................................................................................................................................................ 4
3.1 Key Features...................................................................................................................................................................... 5
3.2 Functional Block Diagram.................................................................................................................................................. 7
3.3 Power-On/Off Procedures.................................................................................................................................................. 8
3.3.1 Power-On Procedure................................................................................................................................................... 8
3.3.2 Power-Off Procedure................................................................................................................................................... 9
3.4 Peripheral and Major Component Description................................................................................................................. 10
3.4.1 Clocking..................................................................................................................................................................... 10
3.4.1.1 Ethernet PHY Clock............................................................................................................................................ 10
3.4.1.2 AM64x SoC Clock............................................................................................................................................... 10
3.4.1.3 PCIe Clock.......................................................................................................................................................... 10
3.4.2 Reset.......................................................................................................................................................................... 11
3.4.3 Power........................................................................................................................................................................ 12
3.4.3.1 Power Input......................................................................................................................................................... 12
3.4.3.2 Reverse Polarity Protection................................................................................................................................ 12
3.4.3.3 Current Monitoring.............................................................................................................................................. 12
3.4.3.4 Power Supply...................................................................................................................................................... 13
3.4.3.5 Power Sequencing.............................................................................................................................................. 15
3.4.3.6 SoC Power.......................................................................................................................................................... 16
3.4.4 Configuration............................................................................................................................................................. 17
3.4.4.1 Boot Modes......................................................................................................................................................... 17
3.4.5 JTAG.......................................................................................................................................................................... 21
3.4.6 Test Automation......................................................................................................................................................... 23
3.4.7 UART Interface.......................................................................................................................................................... 26
3.4.8 Memory Interfaces..................................................................................................................................................... 27
3.4.8.1 DDR4 Interface................................................................................................................................................... 27
3.4.8.2 MMC Interface.................................................................................................................................................... 28
3.4.8.3 OSPI Interface.................................................................................................................................................... 29
3.4.8.4 SPI EEPROM Interface....................................................................................................................................... 30
3.4.8.5 Board ID EEPROM Interface.............................................................................................................................. 30
3.4.9 Ethernet Interface...................................................................................................................................................... 31
3.4.9.1 DP83867 PHY Default Configuration.................................................................................................................. 33
3.4.9.2 DP83869 PHY Default Configuration.................................................................................................................. 33
3.4.9.3 Ethernet LEDs..................................................................................................................................................... 39
3.4.10 Display Interface...................................................................................................................................................... 40
3.4.11 USB 2.0 Interface..................................................................................................................................................... 41
3.4.12 PCIe Interface.......................................................................................................................................................... 41
3.4.13 High Speed Expansion Interface............................................................................................................................. 43
3.4.14 CAN Interface.......................................................................................................................................................... 47
3.4.15 Interrupt................................................................................................................................................................... 48
3.4.16 ADC Interface.......................................................................................................................................................... 48
3.4.17 Safety Connector..................................................................................................................................................... 49
3.4.18 SPI Interface............................................................................................................................................................ 49
3.4.19 I2C Interface............................................................................................................................................................ 49
3.4.20 FSI Interface............................................................................................................................................................ 52
4 Known Issues and Modifications ........................................................................................................................................ 53
4.1 Issue 1 - Embedded XDS110 Connection to AM64x Target in CCS................................................................................ 53
4.2 Issue 2 - MDIO Ethernet PHY Communications.............................................................................................................. 55
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SPRUIX0B – FEBRUARY 2021 – REVISED MARCH 2021
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AM64x GP EVM User's Guide 1
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