Testing the EVM Data Capture with LVDS Interface
8
SLOU489 – August 2017
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
4
Testing the EVM Data Capture with LVDS Interface
This section outlines (1) the external connections required to test the AFE5832 EVM using the LVDS
interface, (2) how to setup the GUIs for testing, and (3) how to capture an analog input signal.
4.1
EVM Hardware Setup
Make the connections shown in
for proper hardware setup.
Figure 4. TSW1400EVM and AFE5832 EVM Hardware Setup for LVDS Capture
1.
Board Mating:
For LVDS data, mate the TSW1400 EVM at connector
J3
to the AFE5832 EVM at
connector
J48
through the high-speed ADC interface connector.
2.
Power Supply:
Connect a 5-V (2-A) power supply using the provided power cable to
J12 (+5V_IN)
of
the TSW1400 EVM or
J11 (+5V_IN)
of the TSW14J50 EVM . See the TSW manual for more
information, if needed.
Next, connect a 5-V (2-A) power supply using the provided power cable to
J61
of the AFE5832 EVM.
Connect the white-striped side of this cable to the positive side of the 5-V power supply.
Optionally, connect a –5-V (1-A) supply at
J63
or TP54 if using the CW circuit. No cable is provided for
this.
Turn on the TSW1400 at the SW7 switch.
3.
USB:
After installing the GUIs as shown in
, connect the USB cable from the PC to
J65
(USB)
located on the top side of the AFE5832 EVM. Connect the USB cable from PC to
J5 (USB_IF)
of the TSW1400 EVM.
NOTE:
TI recommends that the PC USB port be able to support USB2.0. If unsure, always choose
the USB ports at the back of the PC chassis over ones located on the front or sides.
4.
Equipment:
Connect a sine wave generator to SMA
J1, INP1
. Set the frequency to 5 MHz and the
amplitude to –20 dBm. For best performance, a 5-MHz band-pass filter (BPF) is recommended on the
analog input signal to attenuate the harmonics and noise from the signal.
5.
CPLD Switches:
Ensure that all 4 switches in
S5
are in the 'off' position. LEDs D5–D8 should be lit up.