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Power Supplies
Power Supplies
Table 3. Pinout for Serial Control Connector P2
Description
Signal Name
Connector Pin
Signal Name
Description
Chip Select
CS
P2.1
P2.2
SB/2C
Straight binary or 2s complement output
Serial Clock
SCLK
P2.3
P2.4
DGND
Ground
Reserved
N/A
P2.5
P2.6
N/A
Reserved
Frame Sync
FS
P2.7
P2.8
N/A
Reserved
Reserved
N/A
P2.9
P2.10
N/A
Reserved
Reserved
N/A
P2.11
P2.12
N/A
Reserved
Serial Data Out
SDO
P2.13
P2.14
N/A
Reserved
BUSY
BUSY
P2.15
P2.16
N/A
Reserved
Convert Start
CONVST
P2.17
P2.18
DGND
Ground
Power down
PD
P2.19
P2.20
N/A
Reserved
The EVM accepts four power supplies:
•
A dual
±
Vs dc supply for the dual-supply operational amplifiers. The maximum recommended voltage
is
±
12 Vdc.
•
A 5-Vdc supply for the analog section of the board (A/D + Reference).
•
A 5-Vdc or +3.3-Vdc supply for the digital section of the board (A/D + buffers).
There are two ways to provide these voltages. The first way is to connect the voltages to the test points
listed in
Table 4. Power Supply Test Points
Test Point
Signal
Description
TP1
+VA
C12-Vdc supply for amplifier
TP2
–VA
Connect –12-Vdc supply for amplifier
TP3
+BVDD
Apply +3.3 Vdc or +5 Vdc. See ADC data sheet for full range.
TP4
+AVCC
Apply +5 Vdc
The second way is to use the power connector J2 and derive the voltages elsewhere.
gives the
pinout for J2. If using this connector, set W1 jumper to c3.3VD or +5VD from J2 to +BVDD. Shunt
pins 1-2 to 5VD, or pins 2-3 to 3.3VD as the source for the digital buffer voltage supply
(+BVDD).
Table 5. Power Connector J2 Pinout
Signal
J2 Pin
Signal
+VA(+12V)
1
2
–VA(–12 V)
+5VA
3
4
N/C
DGND
5
6
AGND
N/C
7
8
N/C
+3.3VD
9
10
+5VD
ADS8380EVM
SLAU146 – December 2004
5
Summary of Contents for ADS8370EVM
Page 9: ...www ti com 8 Board Layers Board Layers Figure 2 Top Layer ADS8380EVM SLAU146 December 2004 9...
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Page 11: ...www ti com Board Layers Figure 4 Ground Plane ADS8380EVM SLAU146 December 2004 11...
Page 12: ...www ti com Board Layers Figure 5 Bottom Layer ADS8380EVM 12 SLAU146 December 2004...