Digital Interfaces
8
SBAU291 – November 2017
Copyright © 2017, Texas Instruments Incorporated
ADS8168EVM-PDK
3
Digital Interfaces
The EVM interfaces with the PHI that, in turn, communicates with the computer over USB. There are two
devices on the EVM with which the PHI communicates: the ADS8168 ADC (over single- or dual-SDO SPI
bus) and the EEPROM (over I
2
C). The EEPROM comes pre-programmed with the information required to
configure and initialize the ADS8168EVM-PDK platform. Once the hardware is initialized, the EEPROM is
no longer used.
3.1
ADS8168 Digital Interface
The ADS8168EVM-PDK supports SPI and Multi-SPI serial digital interface as detailed in
Channel, 16-Bit, 1-MSPS SAR ADC With Easy to Drive Analog Inputs
. The PHI controller is configured to
operate at a 3.3-V logic level and is directly connected to the digital I/O lines of the ADC. The digital
interface configuration can be selected by navigating to the
ADS8168EVM Interface Configuration Settings
Tab in the GUI. For more information, see
Connector J4 provides the digital I/O connections between the ADS8168EVM board and the PHI
controller.
summarizes the pin-outs for connector J4.
Table 2. Digital I/O Connections for Connector J4
Pin Number
Signal
Description
J4.1
EVM_REG_5V5
Regulated 5.5 V
J4.2, J4.4
EVM_RAW_5V
Power directly from host USB port
J4.16
RESET
Resets ADS8168 (active low)
J4.18
SDI
Serial data in
J4.22
nCS
Active-low chip select
J4.24
SCLK
Serial data clock
J4.28
SCLK_RET
Data capture serial data clock
J4.30, J4.32, J4.34
RVS
Multifunction signal. When nCS is low, this signal reflects conversion status.
J4.38
SDO-0
Serial data out
J4.40
SDO-1
Serial data out
J4.42
Alarm
Output of digital comparator
J4.3, J4.60
GND
Ground connections
J4.50
EVM_DVdd
Power for interface
J4.56
EVM_ID_SDA
SDA for EEPROM
J4.58
EVM_ID_SCL
SCL for EEPROM
J4.59
ID_POWER
Power supply used only to power the EEPROM (U3) in the EVM board
