Texas Instruments ADS7861EVM, User Manual

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Digital Interface
3 Digital Interface
The ADS7861/8361/7863EVM is designed for easy interfacing to multiple control platforms. Samtec part
numbers SSW
– 110 – 22 – F – D – VS – K and TSM – 110 – 01 – T – DV – P provide a convenient, 10-pin dual row
header/socket combination at J2. This header/socket provides access to the digital control and serial data
pins of the ADS7861/8361. Consult Samtec at
http://www.samtec.com or call 1-800-SAMTEC-9 for a
variety of mating connector options. Table 2 describes the J2 serial interface pins.
Table 2. J2: Serial Interface Pins
Pin Number Signal Description
Chip select; active low signal, enables data
J2.1 CS
transfer and device configuration
J2.3 SCLK Serial clock
J2.5 SCLK(R) Serial clock return for DSP host
J2.7 FS Frame sync
J2.9 FS(R) Frame sync return for DSP host
J2.11 SDI Serial data input
J2.13 SDO Serial data output
Interrupt output; provides an interrupt
J2.15 INT
source to the host processor
Conversion start; provides an alternate
J2.17 CSTART
method of conversion initialization
J2.19 SPARE
3.1 Additional Control Options
Table 3 shows the pinout of header J5. This dual-row, four-position header provides additional control
functionality to the ADS7861/8361/7863EVM. Signals A0, M0, and M1 are configured with pull-up resistors
by default. The jumper shunts supplied with the EVM can be used to set these signals to logic low. These
signals can also be connected to control signals in the user's system.
Table 3. J5: Header
Pin Number Signal Description
J5.1 M0 Selects two-channel or four-channel mode
J5.3 M1 Selects between serial outputs A and B
Operates in conjunction with M0. See device
J5.5 A0
data sheet for details.
J5.7 OUT B B channel secondary output
J5.2 to J5.8 (even) DGND Digital ground connections
3 SLAU094A – October 2002 – Revised May 2011 ADS7861/8361/7863EVM
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