1
Features
2
Description
3
Power Supplies
4
Signals
4.1
External Reference
4.2
Input Signals
4.3
Output Signals
4.4
Clock Signal
User's Guide
SBAU116 – October 2005
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Easy testing of the ADS5240/42 family of 12-bit data converters
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Single-ended, transformer coupled inputs.
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PC interface to control internal registers.
The ADS5240/42EVM is designed to provide ease of use in evaluating the performance of the
ADS5240/42 family of 12-bit analog to digital converters with LVDS outputs. When combined with the
ADSDeSer-50EVM, a complete evaluation of the ADS5240/42 family can be performed.
The ADS5240/42 EVM requires three supplies located on P3:
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AVDD – 3.3V DUT analog supply
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DVDD – 3.3V Digital supply for the microcontroller and RS232 level shifter
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LVDD – 1.8V to 3.3V LVDS output driver supply
By default AVDD, DVDD, and LVDD are tied together using a ferrite bead for ease of use. To separate the
supplies, remove FB1, and FB2.
By default, the ADS5240/42 EVM defaults to an internally generated reference. However, by asserting
SW3, the ADS5240/42 will use the REFT and REFB supplied on P2 as its references.
The input signals are applied to SMA connectors J2, J4, J7 and J9. The input signals are transformer
coupled to the inputs of the ADC.
The LVDS outputs from the ADC are sent to P6. P6 is used to connect the ADS5240/42EVM to the
ADSDeSer-50EVM to provide a means to deserialize the data for external processing.
Enter a clean, low jitter, 3Vpp clock on J1. The maximum clock frequency should be with the aid of the
device data sheet. Either a sinusoidal or square-wave clock input can be excepted.
SBAU116 – October 2005
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