Texas Instruments ADS131M04, User Manual, Page: 8 / 34

Digital Interface
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8 SBAU332A – March 2019 – Revised June 2019
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ADS131M04 Evaluation Module
3 Digital Interface
As noted in Section 1 , the EVM interfaces with the PHI and communicates with the computer over the
USB. There are two devices on the EVM with which the PHI communicates: the ADS131M04 ADC (over
SPI) and the EEPROM (over I
2
C). The EEPROM comes pre-programmed with the information required to
configure and initialize the ADS131M04EVM platform. When the hardware is initialized, the EEPROM is
no longer used.
3.1 SPI Communication
The ADS131M04EVM supports limited interface modes as detailed in the ADS131M04 data sheet. The
ADS131M04 uses an SPI-compatible interface to configure the device and retrieve conversion data. SPI
communication on the ADS131M04 is performed in frames. Each SPI communication frame consists of
several words. The word size is configurable as either 16 bits, 24 bits (default), or 32 bits by programming
the WLENGTH[1:0] bits in the MODE register.
Additionally, the DRDY pin indicates when conversion data are available to be read by the master. The
DRDY_SEL[1:0] bits, DRDY_HIZ bit, and the DRDY_FMT bit in the MODE register control the behavior of
the DRDY pin.
For this EVM not all modes and functions for this SPI communication are supported. Functions not
supported are disabled in the EVM GUI software. For more information about the SPI communication, see
the
ADS131M04 data sheet .
3.2 Connection to the PHI
The ADS131M04EVM board communicates with the PHI through a shrouded, 60-pin connector, J5. There
are two round standoffs next to J5 with Phillips-head screws. To connect the PHI to the EVM, remove the
screws, attach the PHI to the EVM, and replace the screws into the standoffs. The screws secure the
EVM to the PHI and ensures the connection between the boards.
Table 5 lists the different PHI connection and their functions.
Table 5. PHI Connector Pin Functions
PHI Connector Pin Name PHI Connector Pin Function
EVM_RAW_5V J5[2] Power-supply source for the analog section of the EVM
GND J5[3] Ground
SYNC/RESET J5[10]
Conversion synchronization or system reset for the
ADS131M04; active low
DIN J5[18] Serial data input for the ADS131M04
CLK J5[20] Master clock input for the ADS131M04
CS J5[22] Chip select for the ADS131M04; active low
SCLK J5[24] Serial data clock for the ADS131M04
SCLK J5[28] Serial data clock for the ADS131M04
DRDY J5[30] Data ready for the ADS131M04; active low
DOUT J5[36] Serial data output for the ADS131M04
EVM_DVDD J5[50] Power-supply source for the digital section of the EVM
SDA J5[56] I
2
C serial data for the EEPROM used to identify the EVM
SCL J5[58] I
2
C serial clock for the EEPROM used to identify the EVM
EVM_ID_PWR J5[59] Power-supply source for the EEPROM used to identify the EVM
GND J5[60] Ground