2.4 ADC3A and ADC3B
The ADS131B26-Q1 features two high-precision, 24-bit ADC channels that are intended for battery stack voltage
measurements (ADC3A and ADC3B). For demonstration purposes, the EVM includes a resistor divider circuit
with an approximate ratio of 1 / 32.5. At gain = 4, which allows an input voltage from –10 V to 10 V on the
positive voltage measurement inputs (VPA and VPB). The negative voltage measurement inputs (VNA and VNB)
are connected to AGND by default.
shows the voltage input schematic for ADC3A.
Figure 2-3. ADC3A Voltage Input Circuit (Schematic)
Analog Interface
8
ADS131B26Q1EVM-PDK Evaluation Module
SBAU413 – OCTOBER 2022
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