Texas Instruments ADS127L11EVM, User Manual, Page: 12 / 35

4.2 Low Dropout Regulator (LDO)
Figure 4-2 shows how the 5.5-V power from the PHI is regulated to 5 V using a low-noise TPS7A4700 LDO. By
default, the shunt on (JP4) 1-2 routes 5.5 V from the PHI to the LDO. The 5-V LDO can also be supplied by
external power on J12 by moving the shunt on (JP4) to position 2-3. The 5-V LDO output is used for the AVDD
connections and can be reprogrammed to different output voltages using R72, R73, R75, R78, R82, and R83.
There is an additional LDO that generates –2.5 V for AVSS, using the low-noise TPS7A3001 LDO. This LDO
is only supplied by external power on J12. By default, AVSS is connected to GND with a shunt on (JP5) 1-2. If
AVSS must be set to –2.5 V, then connect an external negative supply to J12 and move the shunt on (JP5) to
position 2-3.
TP17
GND
TP18
GND
GND
100k
R68
5.2V Analog LDO
EVM_REG_5V5
OUT 1
NC
2
SENSE 3
6P4V2
4
6P4V1
5
3P2V
6
GND 7
1P6V
8
0P8V
9
0P4V
10
0P2V
11
0P1V
12
EN
13
NR
14
IN
15
IN
16
NC
17
NC
18
NC
19
OUT 20
PAD 21
TPS7A4700RGWR
U8
10uF
C48
GND
0
R72
0
R73
DNP
0
R75
DNP
0
R78
0
R82
DNP
0
R83
DNP
1uF
C50
0.1
R69
25V
22µF
C49
5V_LDO
10.0k
R70
Green
1
2
D3
APT2012LZGCK
1
2
JP2
/LDO_EN
DNP
3V
D7
MMSZ4683T1G
TP14
5V_LDO
DNP
TP13
AVSS
DNP
TP15
5V5
DNP
TP16
GND
DNP
GND
0R85
DNP
AVSS
AVSS
AVSS
OUT 1
FB
2
NC
3
GND 4
EN
5
NR/SS
6
DNC
7
IN
8
PAD 9
TPS7A3001DRBR
U9
10uF
C56
10uF
C52
0.01µF
C38
10.0k
R86
11.3k
R80
1 2 3
JP4
TSW-103-07-G-S
1 2 3
JP5
TSW-103-07-G-S
GND
-2.5V
GND
GND 0.01µF
C57
GND
GND
-2.5V
GND
+Vin
-Vin
-Vin
-2.5V Analog LDO
0
R84
Figure 4-2. 5.5 V to 5 V LDO
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12 ADS127L11EVM-PDK Evaluation Module SBAU351 – APRIL 2021
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