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ADS1278EVM-CVAL Hardware Details
20
SBAU324 – September 2018
Copyright © 2018, Texas Instruments Incorporated
ADS1278EVM-CVAL Evaluation Module User's Guide
5.5.3.2
DOUTx Header, J2
All the data output signals (DOUT1 to DOUT8) can be monitored on
J2
.
illustrates the pinout for
J2
.
(1)
Pin 1 is top right-hand corner, located next to reference designator.
Table 10. J2: DOUTx Header
Data Out Line
Designator
Data Out Line
DOUT1
1
(1)
2
DOUT2
DOUT3
3
4
DOUT4
DOUT5
5
6
DOUT6
DOUT7
7
8
DOUT8
5.6
Power Supply Header, J5
J5
is the power-supply input connector.
lists the configuration details for
J5
. Supplies of 1.8 V,
3.3 V, and 5.0 V are required for operation of the EVM. When using the EVM with the MMB0, these
voltages are generated by the MMB0 and no external supplies are required. For operation as a stand-
alone EVM, the power supplies should be connected as shown below.
(1)
Pin 1 is bottom left-hand corner, located next to reference designator.
Table 11. J5 Configuration: Power-Supply Input
Function
Pin Name
Designator
Pin Name
Function
Not used for this design
Not used
1
(1)
2
Not used
Not used for this design
+5-V analog supply
+5VA
3
4
Not used
Not used for this design
Digital ground
DGND
5
6
AGND
Analog ground input
1.8-V digital supply
+1.8VD
7
8
Not used
Not used for this design
3.3-V digital supply
+3.3VD
9
10
N/A
Do not use
NOTE:
For monitoring the current from each supply,
CM1, CM2,
and
CM3
(0-
Ω
resistors) can be
removed and replaced with sense resistors or ammeters.
The ADS1278-SP digital supplies are connected as follows:
•
IOVDD supply is connected to the +1.8VD pin of the
J3
header.
•
DVDD supply is connected to the +3.3VD pin of the
J3
header.
The ADS1278-SP analog supply, AVDD, is connected to the +5VA pin of the
J5
header.