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Quick Reference
Figure 2. Default Software Screen
3
Quick Reference
provides a quick summary of the connections required for operation of the EVM as a stand-alone
board.
Table 3. Critical Connections
Pin
Function
Header/Pin
Description
Name
SCLK
J2.5
CLKR
SPI Serial Clock
DIN
J2.13 (Top)
DR
SPI Data Input to ADC (MOSI)
SPI
DOUT
J2.13 (Bottom)
DR
SPI Data Output from ADC (MISO)
J2.9 Top
FSOUT
SPI new conversion indication (see
DRDY/FSYNC
J2.9 Bottom
FSR
1.8V
J3.7
+1.8VD
1.8V supply for ADC DVDD (option)
3.3V
J3.9
+3.3VD
3.3V supply for ADC DVDD (option)
5.0V
J3.3
+5VA
5.0V supply for ADC AVDD
Positive supply for buffers (+15V)
AVDD (EVM supply)
J3.1
+VA
Power
(only required when using analog buffers)
Negative supply for buffers (-15V)
AVSS (EVM supply)
J3.2
-VA
(only required when using analog buffers)
DGND
J3.5
DGND
Digital ground from MMB0
AGND
J3.6
AGND
Analog ground from MMB0
Analog Inputs
Analog inputs and external reference
J4/5
Various
Analog inputs and external reference to
ADC
5
SBAU107C – November 2004 – Revised November 2014
ADS1271EVM and ADS1271EVM-PDK User's Guide
Copyright © 2004–2014, Texas Instruments Incorporated