Texas Instruments ADS1271EVM User Manual Download Page 11

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ADS1271EVM Hardware Details

Table 10. Digital Interface Pinout (J2) (continued)

Pin Number

Signal

Description

J2.20

SDA

I

2

C bus data line

5.4

Power Supplies, J3

J3 provides connection to the common power bus for the ADS1271EVM. Power is supplied on the pins
listed in

Table 11

.

Table 11. Power Supply Pinout

Signal

Pin Number

Signal

+VA (+15V to power buffer amplifier section)

1

2

–VA (–15V to power buffer amplifier section)

+5VA

3

4

Unused

DGND

5

6

AGND

+1.8VD

7

8

Unused

+3.3VD

9

10

+5VD

When power is supplied to J3, J6 allows for either 3.3V or 1.8V to be applied to the digital sections of the
ADS1271. J6 also provides for a method of measuring AVDD and DVDD supply currents if the shunts on
J6.1-2, J6.3-4, J6.5-6, and J6.7-8 are removed and a current meter is connected between the appropriate
pins. See the schematic and printed circuit board silkscreen for details.

5.4.1

ADC Power

Power for the ADS1271 analog supply voltage (AVDD) comes from +5VA, which is supplied through J3.3.
The shunt from J6 pins 1 to 2 applies this supply to the U7 ADS1271 device, while the shunt from J6 pins
5 to 6 applies this supply to the U8 ADS1271.

The ADS1271 digital supply voltage (DVDD) is selected using J6. When a shunt is applied from J6 pins 9
to 10, +1.8VD is selected, and this power comes from J3.7. If a shunt is placed from J6 pins 11 to 12 (the
default factory setting), +3.3VD is selected, which is provided from J3.9. J6 pins 13 and 15 provide a
means of connecting analog and digital grounds to the EVM; these grounds come from J3.6 and J3.5,
respectively. These grounds are always connected together at the EVM.

CAUTION

Verify that all power supplies are within the safe operating limits shown on the

ADS1271 data sheet

before applying power to the EVM.

CAUTION

Note that a shunt should only be connected between J6 pins 9 and 10

OR

pins

11 and 12, but never both; doing so would short the +3.3V supply to the +1.8V
digital supply.

5.4.2

Stand-Alone Operation

When used as a stand-alone EVM, the analog power can be applied to J6.2 and J6.6, referenced to
J6.13. DVDD can be applied to J6.4 and J6.8, referenced to J6.15.

11

SBAU107C – November 2004 – Revised November 2014

ADS1271EVM and ADS1271EVM-PDK User's Guide

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Copyright © 2004–2014, Texas Instruments Incorporated

Summary of Contents for ADS1271EVM

Page 1: ...etails bill of materials and schematic The following related documents are available through the Texas Instruments web site at www ti com Table 1 EVM Compatible Device Data Sheets Literature Device Nu...

Page 2: ...d that can be used with provided software to quickly evaluate the device This manual covers the operation of the ADS1271EVM PDK Throughout this document the abbreviation EVM and the term evaluation mo...

Page 3: ...rence S4 Left Buffer connected to CH2 input S5 Left 2 5V reference connection to CH1 reference S6 Left Buffer connected to CH1 input S7 Left Hardware control of Format is floating J6 AV1 Installed AVD...

Page 4: ...b After the main program is installed a dialog box appears with instructions for installing NI VISA 3 1 Runtime i Click OK to proceed ii Click Unzip and the archive extracts itself and automatically...

Page 5: ...3 7 1 8VD 1 8V supply for ADC DVDD option 3 3V J3 9 3 3VD 3 3V supply for ADC DVDD option 5 0V J3 3 5VA 5 0V supply for ADC AVDD Positive supply for buffers 15V AVDD EVM supply J3 1 VA Power only requ...

Page 6: ...click the Acquire button In Acquire mode you can only view the data from one channel at a time To choose channels use the Channel box 4 1 1 1 AC Analysis The basic AC analysis consists of the FFT grap...

Page 7: ...SV file containing comma delimited decimal ADC values The first data column is Channel 1 followed by Channel 2 The data file can be imported into a spreadsheet for future inspection and analysis 4 2 C...

Page 8: ...ector Select source of reference for U8 S6 U8 Analog Input selector Select source of analog input for U8 S7 Interface selector Select interface type FORMAT 5 2 Analog Connections 5 2 1 Analog Interfac...

Page 9: ...Auxiliary Reference Input 2 Positive terminal J5 4 AUXREF2N Auxiliary Reference Input 2 Negative terminal J5 5 GND Ground 5 2 2 Analog Input Selection The analog input signals can be routed directly...

Page 10: ...our EVMs can be stacked allowing for eight devices to be placed in a signal chain To accommodate stacking of EVMs J2 has some different connections on the top and the bottom side of the board Differen...

Page 11: ...e U7 ADS1271 device while the shunt from J6 pins 5 to 6 applies this supply to the U8 ADS1271 The ADS1271 digital supply voltage DVDD is selected using J6 When a shunt is applied from J6 pins 9 to 10...

Page 12: ...gardless of the logic level used on J2 Note that you are not required to include this circuitry in your own designs typically no glue logic is required to connect one or more ADS1271s to a processor 5...

Page 13: ...he second ADC U7 DRDY line is not connected FSOUT is not connected In FSYNC mode the FSYNC pins of both ADCs are tied together and the signal on FSR is copied to the top connector on pin FSOUT Table 1...

Page 14: ...low an external clock source should be connected to J2 17 In this setting the onboard clock oscillator is shut down 14 ADS1271EVM and ADS1271EVM PDK User s Guide SBAU107C November 2004 Revised Novembe...

Page 15: ...RES 100K OHM 1 10W 5 0603 SMD Panasonic ERJ 3GEYJ104V 21 8 1K R7 R14 RES 1K OHM 1 10W 1 0603 SMD Panasonic ERJ 3EKF1001V 22 8 47 R15 R18 R23 R26 RES 47 OHM 1 10W 5 0603 SMD Panasonic ERJ 3GEYJ470V 23...

Page 16: ...6 1 ADS1271EVM Schematic The schematic diagram is provided as a reference 16 ADS1271EVM and ADS1271EVM PDK User s Guide SBAU107C November 2004 Revised November 2014 Submit Documentation Feedback Copy...

Page 17: ...S3 SW DP3T S5 SW DP3T C25 1N C23 100P C22 100P REFP REFN AUXREF1P AUXREF1N REFP AUXREF2P REFN AUXREF2N AMPOUT2P AMPOUT2N AIN1P AIN1N AIN0P AIN0N AUX1P AUX1N AUX2P AUX2N C14 10U ADCAVDD2 C19 10U C16 1...

Page 18: ...tions table to consolidate connection information 5 Changed Sections 4 and 5 organization for clarity 6 Changed text to indicated minimum and maximum number of points for collection 7 Changed BOM to r...

Page 19: ...ing the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repa...

Page 20: ...essful communication This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna imped...

Page 21: ...ified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors current sens...

Page 22: ...REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE L...

Page 23: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

Page 24: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments ADS1271EVM ADS1271EVM PDK...

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