Switches
2-8
2.3
Switches
The positions and functions of the switches are shown in Figure 2−6.
Figure 2−6. Switches
2.3.1
S1: System Clock Select
This switch selects which of the three available clock sources on the
ADS1244/45EVM will be provided to the CLK pin on the device. The switch
positions are described in Table 2−5.
Table 2−5. System Clock Select Switch
Board
Marking
Switch Position
System Clock Source
OBCLKEN State
OB
Top
Onboard 4.9152MHz
High
OB/2
Middle
Onboard 2.4576MHz
High
EXT
Bottom
External (J5, pin 17)
Low
This switch also controls the state of OBCLKEN. This signal enables the
oscillator (U2), and is also brought to pin 19 of J5. External systems can
read this signal to determine whether to generate a clock.
2.3.2
S2: Input Select
This switch controls which lines are routed to the ADS1244/45 input pins.
The switch positions are described in Table 2−6.
Table 2−6. Input Select Switch
Board
Marking
Switch
Position
Input Source
ADS1244/45
VIN+
ADS1244/45
VIN−
EXT
Top
External (J1, pins 1 and 2)
J1 pin 2
J1 pin 1
REF
Middle
Reference voltage
+2.5V
Ground
ZERO
Bottom
Zero (shorted to reference)
+2.5V
+2.5V