manualshive.com logo in svg

Texas Instruments ADS1194, User Manual, Page: 48 / 57

Share
Download
Texas Instruments ADS1194 User Manual Download Page 48

Optional External Hardware (Not Included)

www.ti.com

48

SBAU171D – May 2010 – Revised January 2016

Submit Documentation Feedback

Copyright © 2010–2016, Texas Instruments Incorporated

External Optional Hardware

Figure 46. 15-Pin, Twisted Wire Cable to Banana Jacks

Figure 47. 15-Pin, Twisted Wire Cable

Figure 48. Cardiosim ECG Simulator Tool

Summary of Contents for ADS1194

Page 1: ...ure Number ADS1298 SBAS459 ADS1198 SBAS471 Contents 1 ADS1298ECG FE ADS1198ECG FE Overview 3 1 1 Important Disclaimer Information 3 1 2 Introduction 4 1 3 Supported Features 4 1 4 Features Not Support...

Page 2: ...Registers Settings 18 17 Scope Tool Features 19 18 Scope Analysis Tab Noise Levels for Each Channel Shown 19 19 Zoom Tool Options 20 20 Histogram Bins for 12 Lead ECG Signal 21 21 Statistics for the S...

Page 3: ...ence Jumper Options 39 11 Test Signals 39 12 Serial Interface Pinout 39 13 Bill of Materials ADS1x98ECG FE 42 Trademarks Pentium III Celeron are registered trademarks of Intel Corporation Microsoft Wi...

Page 4: ...t of the ADS1x98ECG FE but does not provide technical details about the MMB0 itself This document covers the operation of the ADS1x98ECG FE evaluation system Throughout the document the abbreviation E...

Page 5: ...t http www ti com Figure 1 ADS1x98ECG FE Kit The complete kit includes the following items ADS1x98ECG FE printed circuit board PCB MMB0 Modular EVM motherboard 1 6 Minimum System Requirements for ADS1...

Page 6: ...This section provides a QuickStart guide to quickly begin evaluating the EVM using the ADS1x98ECG FE software 2 1 Default Jumper Switch Configuration Figure 2 shows the jumpers found on the ADS1x98EC...

Page 7: ...input JP27 Installed 1 2 top WCT connected to CH7 input Installed 3 4 bottom ECG_V5 connected to CH7 input JP28 Installed 1 2 top WCT connected to CH6 input Installed 3 4 bottom ECG_V3 connected to CH...

Page 8: ...starting UI screen of the software The UI consists of a user menu Section 3 1 a few top level controls Section 3 2 and a tabbed interface with different functions available on the different tabs The...

Page 9: ...it closes the application Help Menu see Figure 5 The Help menu provides the About option which display the software and firmware version that is currently being used Please have this information if yo...

Page 10: ...ays the data input referred while not checking displays the data as converted The Show Poll Lead Off Status displays a window see Figure 7 that shows the status of the Lead Off status registers LOFF S...

Page 11: ...ther divide the control registers into different functions groups The sub tabs are Channel Registers tab Section 3 4 2 LOFF and RLD tab Section 3 3 GPIO and Other Registers tab Section 3 4 4 Register...

Page 12: ...e enable the daisy chain configuration options and program the data rate NOTE Since the HR bit is not available in the ADS1198 the Configuration Register 1 control will not show this control when test...

Page 13: ...VDD INP INN PGA AVDD INP INN ADS129x ADS129x www ti com Using the ADS1298ECG FE Software 13 SBAU171D May 2010 Revised January 2016 Submit Documentation Feedback Copyright 2010 2016 Texas Instruments I...

Page 14: ...detection is enabled for each channel individually and for each input positive and negative Set All LOFFP Bits and Set All LOFFN Bits allow the user to turn on or off all the enable bits at once inst...

Page 15: ...ettings to configure the lead off threshold Figure 13 illustrates the connections from the positive and negative inputs to the lead off comparators The output of the comparators is viewed by using Sho...

Page 16: ...ut is selected the GPIODx control is enabled allowing the user to set the value to output If the GPIO is selected as an input the GPIODx control is disabled and shows the value of the GPIO If any of t...

Page 17: ...16 Submit Documentation Feedback Copyright 2010 2016 Texas Instruments Incorporated ADS1298ECG FE ADS1198ECG FE 3 4 4 1 Wilson Central and Augmented Lead Registers The Wilson Central Voltage an averag...

Page 18: ...r Map ADC Register The Register Map tab is a helpful debug feature that allows the user to view the state of all the internal registers This tab is illustrated in Figure 16 Refresh Registers control u...

Page 19: ...5 1 Scope Tab Anaysis The Scope tool is useful for examining the exact amplitude of the measured input signals from each channel Additionally users can determine the noise contribution from each chan...

Page 20: ...3 5 1 1 Zoom Tool The zoom tool allows the user to zoom in either on all channels simultaneously or on a single channel Figure 19 shows an example of the waveform examination tool with the magnifying...

Page 21: ...harmonics Figure 20 illustrates the histogram output for a 12 lead signal The same ECG Signal Zoom analysis may be used on the histogram plots for a more detailed examination of the amplitude bins Fig...

Page 22: ...f the ADS1298 NWINDOW is the number of odd integer cycles during a given sampling period NTOTAL is the number of data points in powers of 2 that is used to create the FFT If the conditions for coheren...

Page 23: ...hannel noise Figure 24 FFT Analysis Input Short Condition 4 User Defined Dynamic Range This section enables the user to examine the SNR of a specific channel within a given frequency band defined by L...

Page 24: ...98ECG FE Software www ti com 24 SBAU171D May 2010 Revised January 2016 Submit Documentation Feedback Copyright 2010 2016 Texas Instruments Incorporated ADS1298ECG FE ADS1198ECG FE Figure 26 FFT Plot U...

Page 25: ...and Augmented Leads displays LEAD I LEAD II LEAD III aVR aVL and AVF signals Chest Leads displays V1 V6 signals NOTE For display that shows 6 leads combined the ECG signals have any DC offset removed...

Page 26: ...Cutoff Freq controls in the high pass filter part of the Post Processing Filters group right side of the box NOTE The digital filters are not part of the ADS1298 These are digital filters implemented...

Page 27: ...h item will be saved if the corresponding checkbox is checked The Data to Save group allows the user to save the various data sets collected from the ADS1298 The CH x controls allow the user to specif...

Page 28: ...he ADS1298ECG FE Software www ti com 28 SBAU171D May 2010 Revised January 2016 Submit Documentation Feedback Copyright 2010 2016 Texas Instruments Incorporated ADS1298ECG FE ADS1198ECG FE Figure 30 Sa...

Page 29: ...channels to an internal short with a data rate of 500SPS and a PGA gain of 6 Once the Acquire button is pressed the Scope Analysis should reflect input referred VPP values less than 5 VPP 4 2 Internal...

Page 30: ...ture sensor input the ADC internal temperature is calculated from the ADC output voltage using Equation 1 Figure 32 Internal Temperature Sensor 1 The ADC can be configured to give a temperature readin...

Page 31: ...or to the EVM through the DB15 connector J1 Refer to Section A 5 for the ECG cable details The ECG electrode signals are passed through a single pole RC filter followed by the lead configuration For E...

Page 32: ...ed by the ADS1298 device The WCT1 and WCT2 registers provide controls to select any of the eight inputs CH1P to CH4P CH1M to CH4M for routing to the three integrated WCT amplifiers The ADS1298ECG FE i...

Page 33: ...measurement confirms whether the RLD loop is functional The on chip RLD signal can be fed back into the ADS1298 by shorting JP1 This RLD signal can then be sent to the ADC to measure for debug purpos...

Page 34: ...aveform created by a Fluke Medsim 300B processed by the ADS1298 at a data rate of 8kSPS Using higher data rates increases power consumption because all channels must sample at this data rate simultane...

Page 35: ...schematic and layout are provided in Appendix A The ADS1298ECG FE can be used as a demonstration board for standard 12 lead ECG applications with an input configuration of 10 electrodes Users can als...

Page 36: ...tral Terminal WCT connection Open WCT NOT connected to JP26 30 and JP33 Installed WCT connected to JP26 30 and JP33 for connection to CH1 and CH4 8 IN JP17 ECG shield drive buffer input Header Not Ins...

Page 37: ...onnected Installed Channel input connected to ECG_V6 5 2 Power Supply The ADS1x98EVM mounts on the MMB0 EVM with connectors J2 J3 and J4 The main power supplies 5V 3V and 1 8V for the front end board...

Page 38: ...r from an externally connected source The external oscillator included on the EVM is powered from DVDD the same supply as the ADS1298 Care must be taken to ensure that the externally supplied clock os...

Page 39: ...can also be used as an auxiliary differential input channel Alternatively with appropriate user configuration these pins may provide PACE detection for use with external PACE detection circuitry see P...

Page 40: ...re Refer to the ADS1298 product data sheet or ADS1198 product data sheet for the common mode range for various programmable gain amplifier PGA gain settings Section 4 4 1 explains the process used to...

Page 41: ...ayout and ECG Cable Details A 1 Overview This section contains the complete bill of materials printed circuit board PCB layouts and schematic diagrams for the ADS1x98ECG FE NOTE Board layouts are not...

Page 42: ...C75 C80 C82 C84 C86 C88 C91 C92 C93 Capacitor ceramic 47pF 50V 5 C0G 0603 GRM1885C1H470JA01D Murata 0 C33 C35 C37 Not installed 0 C39 Not installed 4 C53 C59 C63 C64 Capacitor ceramic 2 2 F 6 3V 10 X5...

Page 43: ...1 R52 Resistor 47 5k 1 10W 1 SMD 0603 RC0603FR 0747K5L Yageo 1 R53 Resistor 43 2k 1 10W 1 SMD 0603 RC0603FR 0743K2L Yageo 1 R56 Resistor 49 9k 1 10W 1 SMD 0603 RC0603FR 0749K9L Yageo 1 R57 Resistor 4...

Page 44: ...ack Copyright 2010 2016 Texas Instruments Incorporated Schematics BOM Layout and ECG Cable Details A 4 Printed Circuit Board Layout Figure 38 through Figure 43 show the ADS1x98ECG FE PCB layouts Figur...

Page 45: ...SBAU171D May 2010 Revised January 2016 Submit Documentation Feedback Copyright 2010 2016 Texas Instruments Incorporated Schematics BOM Layout and ECG Cable Details Figure 42 Internal Ground Plane Laye...

Page 46: ...44 shows the details of the recommended ECG cable Cable details 10 lead ECG cable for Philips HP snap button Part No 010302013 http www biometriccables com index php productID 692 10 lead ECG cable f...

Page 47: ...Hardware Not Included The input of the ADS1x98ECG FE requires a DB15 connector Figure 45 illustrates the most optimal cable connection to the ADS1298ECG FE Figure 46 and Figure 47 show two alternate w...

Page 48: ...ay 2010 Revised January 2016 Submit Documentation Feedback Copyright 2010 2016 Texas Instruments Incorporated External Optional Hardware Figure 46 15 Pin Twisted Wire Cable to Banana Jacks Figure 47 1...

Page 49: ...ut connector barrel plug positive center 2 5 mm I D x 5 5 mm O D 9 mm insertion depth Complies with applicable regional safety standards Figure 49 shows a 6V power supply cable not provided in the EVM...

Page 50: ...UTION Do not connect the ADS1x98ECG FE before installing the software on a suitable PC Failure to observe this caution may cause Microsoft Windows to not recognize the ADS1x98ECG FE The latest softwar...

Page 51: ...y 2016 Submit Documentation Feedback Copyright 2010 2016 Texas Instruments Incorporated Software Installation Figure 50 Initialization of ADS1x98ECG FE Figure 51 License Agreement Figure 52 Installati...

Page 52: ...L JP15 ELEC_SHD ECG_V2 ECG_V3 ECG_V4 ECG_V5 ECG_V6 ECG_LA ECG_RA ECG_LL ECG_RL ECG_V1 ECG_SHD_DRV 1 5 C85 NI AVSS AVDD R31 NI R32 NI C89 NI AVSS AVDD R35 NI R36 NI C79 NI AVSS AVDD R27 NI R28 NI C87 N...

Page 53: ...R66 NI AVDD R58 NI AVSS ECG_V2 ECG_V3 ECG_V4 ECG_V5 ECG_V6 ECG_LA ECG_RA ECG_LL ECG_V1 PACEOUT2 PACEOUT1 PACEOUT2 PACEOUT1 PWDN DAISY_IN GPIO3 GPIO4 DAISY_IN GPIO3 GPIO4 DAISY_IN 1 2 3 4 5 6 7 8 9 10...

Page 54: ...Drivers C36 NI AVDD AVDD AVSS AVSS R47 NI C37 NI C38 NI C39 NI R48 NI C42 NI C41 NI R49 NI JP3 NI External Reference C44 NI VIN 2 GND 4 OUT 6 TRIM 5 TEMP 3 N C 1 N C 7 N C 8 U3 NI C34 NI AVDD AVSS C4...

Page 55: ...G Power Supplies C57 0 1uF R52 47 5K R53 43 2K JP20 JP2 EN 3 NR FB 4 OUT 5 GND 2 IN 1 U7 TPS73230 R54 NI R55 NI C62 NI C59 2 2uF L5 3 3uH C61 10uF C60 10uF EN 3 NR FB 4 OUT 5 GND 2 IN 1 U9 TPS73201 R5...

Page 56: ...OUT GPIO2 SPI_CLK SPI_CS SPI_START SPI_IN GPIO1 MDK Interface Connectors Dummy Connector JP4 RESET JP24 JP21 JP22 NOTE J2 J3 J4 female connectors should be populated from the bottom side EXT_CLK R67 1...

Page 57: ...TI Resource NO OTHER LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD...

Reviews:

No comments