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Quick-Start Procedure for Digital DDC (Decimation Plus NCO) Mode in ADC32RF4x and ADC32RF8x
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SLAU620D – April 2016 – Revised August 2017
Copyright © 2016–2017, Texas Instruments Incorporated
ADC32RFxx-EVM
Figure 21. ADC32RFxx-EVM GUI DDC Configuration Tab
11. Enter "2949.12" in the box for
Sample Clock
rate in MHz.
12. Enter "1900" in the box for the
Channel A DDC0 NCO1
frequency. The control value for NCO1 should
become 42222 as shown in
NOTE:
These settings only apply with Fs = 2.94912 GHz. The NCOs in the ADC32RF80 are set to a
desired LO frequency by a numeric control that is a fraction of the sampling frequency. If the
sampling frequency changes, then the NCO frequency changes. In order to
find
the input
tone in the resulting FFT capture, the sampling frequency and the NCO frequency must be
known in order to know where the input tone should be located in the final FFT result.