10
2
2
.
.
4
4
B
B
l
l
o
o
c
c
k
k
D
D
i
i
a
a
g
g
r
r
a
a
m
m
o
o
f
f
H
H
D
D
M
M
I
I
S
S
i
i
g
g
n
n
a
a
l
l
R
R
e
e
c
c
e
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i
i
v
v
i
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n
n
g
g
This section describes the block diagram of HDMI signal receiving.
Figure 2-4
shows the block diagram of HDMI signal receiving. Please refer to the schematic
included in the CD for more details. The HDMI receiver is controlled through the I2C interface,
where the host works as master and the transmitter works as a slave. Because the pin PCADR is
pulled low, the transmitter I2C device address is set to 0x90. Through the I2C interface, the host
board can access the internal registers of receiver to control its behavior. The receiver can support
two receiving ports, but only one port can be activated at the same time.
Figure 2-4 The block diagram of HDMI signal receiving
The host can use the reset pin RX_RST_N to reset the receiver, and listen to the interrupt pin
RX_INT_N to detect change of the receiver status. When interrupt happens, the host needs to read
the internal register to find out which event is triggered and perform proper actions for the interrupt.
