Board Components
9
1-6
Level Translators and Configuration Headers
This section describes how to use the level translators and configuration headers on the THDB-H2S board
The level translators of the THDB-H2S board convert the signal levels between the HSMC and Santa Cruz
connectors according to the configurations of the headers (J8, J9). Figure 3.4 shows the block diagram of
such function. Table 3.1 and Table 3.2 list the configurations of the HSPROTO_IO BUS and the PROTO_IO
BUS, respectively
The voltage level of the HSPROTO_IO BUS is controlled by VHSMC(VCCA pin); the voltage level of the
PROTO_IO_BUS is controlled by VSC(VCCB pin), as shown in Figure 3.4. Therefore, Shorting Pin 1 and Pin
2 of J8 provides 2.5V to HSPROTO_IO BUS. Alternatively, shorting Pin 2 and Pin 3 of the J8 provides 3.3V to
the HSPROTO_IO BUS. Similarly shorting Pin 1 and Pin 2 of J9 provides 3.3V to the PROTO_IO BUS.
Shorting Pin 2 and Pin 3 provides 5V to the PROTO_IO BUS.
Note:
1.
Headers J8 and J9 must be configured with jumpers. If the pin1, pin2, and pin3 are opened at the
same time, the level translator will NOT work.
2.
Because of the characteristic of the level translators, the data rate of the HSPROTO_IO and
PROTO_IO bus should be under 50 Mbps.
Figure 3.4 The diagram of the voltage-controlling circuit block
