Terasic Apollo S10, User Manual

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Apoolo-S10
User Manual 8 www.terasic.com
March 31, 2020

Power Source

12V from 2x4 PCIe connector

12V from Samtec connector (reserved for carrier board)
1.3. Block Diagram
Figure 1-3 shows the block diagram of the Apollo S10 board. To provide maximum
flexibility for the users, all key components are connected to the Stratix ® 10 SX FPGA
device. Thus, users can configure the FPGA to implement any system design.
Figure 1-3 Block diagram of the Apollo S10 board
1.4. Mechanical Specifications
Figure 1-4
and
Figure 1-5
are the top and bottom Mechanical Layout of Apollo S10
board. The unit of the Mechanical Layout is millimeter (mm).