Apollo Carrier Board
User Manual
23
www.terasic.com
September 22, 2020
Chapter 4
Setup Thunderbolt 3
hunderbolt 3 is unique communication path between the Host PC and Apollo Carrier board.
while the Apollo S10 SoM is connected to the carrier board to form
the Apollo Developer Kit. With a Thunderbolt 3 cable, Host PC can communicate with the
FPGA on the developer kit via PCIe protocol (PCIe design is required in the FPGA). For the
OpenCL applications with the Intel FPGA, the PCIe bus is the main interface for communicating and
transferring data with the Host PC. The Thunderbolt 3 port on the Apollo Developer Kit allows the
user to build PCIe connection for the FPGA and the Host PC via a Thunderbolt 3 cable.
Therefore, a Host PC equipment with Thunderbolt 3 port is required to work with the Apollo
Developer Kit for PCIe applications. This chapter will show user how to setup Thunderbolt 3
connection between the Host PC and the Apollo Developer Kit for the first time.
This chapter describes how to set up a Thunderbolt 3 connection in windows and test whether the
PCIe device can be detected.
Note, the current Linux PCIe driver provided by Terasic does not
support connection via Thunderbolt 3. So the Linux part is not introduced for the time being.
Figure 4-1 PCI Express Pin Connection
4.1
Hardware Requirement
A Host PC with Thunderbolt 3 Port is required to perform PCIe Applications. The
PC should be:
Built-in Thunderbolt 3 Port or with Thunderbolt 3 Card Installed.
Windows Installed
Thunderbolt 3 driver installed
T
