Terasic ADC-FMC, User Manual

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ADC-FMC User Manual
2
www.terasic.com
April 24, 2020
Chapter 1
Introduction
The Terasic ADC-FMC is a four-channel high speed ADC daughter card with FMC interfaced. Two
AD9648BCPZ-125 chips are used in this board. One AD9648BCPZ-125 chip can provide two ADC
channels, and each channel can provide maximal 125 MSPS with 14-bits resolution data. The
build-in onboard clock generator (Si5340B) provides the reference clock for the ADC chip. The
reference clock of the ADC chip also can come from a FPGA via the on-board FMC connector or
from an external clock source via the on-board SMA connector.
Note, the FPGA main board FMC interface will support VADJ 1.8V to work with ADC-FMC.
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The ADC-FMC kit comes with the following items:
•
ADC-FMC Daughter Card
•
Screw & Copper Pillar Package
•
CD Download Guide
The system CD contains technical documents of the ADC-FMC kit, which include component
datasheets, demonstrations, schematic and user manual. Users can download the CD from the link
below:
http://adc-fmc.terasic.com/cd
Figure 1-1 shows the contents of the ADC-FMC kit.
Figure 1-1 Contents of the ADC-FMC Kit